MCP6281-E/SN Microchip Technology, MCP6281-E/SN Datasheet - Page 11

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MCP6281-E/SN

Manufacturer Part Number
MCP6281-E/SN
Description
IC OPAMP 2.2V SNGL R-R 8SOIC
Manufacturer
Microchip Technology
Datasheets

Specifications of MCP6281-E/SN

Slew Rate
2.5 V/µs
Amplifier Type
General Purpose
Number Of Circuits
1
Output Type
Rail-to-Rail
Gain Bandwidth Product
5MHz
Current - Input Bias
1pA
Voltage - Input Offset
3000µV
Current - Supply
450µA
Current - Output / Channel
25mA
Voltage - Supply, Single/dual (±)
2.2 V ~ 6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Op Amp Type
General Purpose
No. Of Amplifiers
1
Bandwidth
5MHz
Supply Voltage Range
2.2V To 5.5V
Amplifier Case Style
SOIC
No. Of Pins
8
Operating Temperature Range
-40°C To
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
-3db Bandwidth
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCP6281-E/SN
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
4.0
The MCP6281/2/3/4/5 family of op amps is manufac-
tured
process. This family is specifically designed for low-
cost, low-power and general purpose applications.
The low supply voltage, low quiescent current and
wide bandwidth makes the MCP6281/2/3/4/5 ideal for
battery-powered applications.
4.1
The MCP6281/2/3/4/5 op amp is designed to prevent
phase reversal when the input pins exceed the supply
voltages. Figure 4-1 shows the input voltage exceeding
the supply voltage without any phase reversal.
FIGURE 4-1:
No Phase Reversal.
The input stage of the MCP6281/2/3/4/5 op amps use
two differential CMOS input stages in parallel. One
operates at low common mode input voltage (V
while the other operates at high V
topology, the device operates with V
above V
age (V
V
Input voltages that exceed the absolute maximum
voltage (V
excessive current to flow into or out of the input pins.
Current beyond ±2 mA can cause reliability problems.
Applications that exceed this rating must be externally
limited with a resistor, as shown in Figure 4-2.
 2004 Microchip Technology Inc.
DD
+ 0.3V to ensure proper operation.
-1
6
5
4
3
2
1
0
OS
using
DD
APPLICATION INFORMATION
Rail-to-Rail Inputs
-15
) is measured at V
SS
and 0.3V below V
-14
– 0.3V to V
Microchip's
-13
-12
V
IN
The MCP6281/2/3/4/5 Show
Time (1 ms/div)
-11
DD
SS
-10
state-of-the-art
. The Input Offset Volt-
V
CM
+ 0.3V) can cause
OUT
-9
= V
-8
CM
SS
CM
-7
V
G = +2 V/V
– 0.3V and
. With this
DD
up to 0.3V
= 5.0V
-6
CMOS
-5
CM
),
FIGURE 4-2:
Resistor (R
4.2
The output voltage range of the MCP6281/2/3/4/5 op
amp is V
when R
V
4.3
Driving large capacitive loads can cause stability
problems for voltage feedback op amps. As the load
capacitance increases, the feedback loop’s phase
margin decreases and the closed-loop bandwidth is
reduced. This produces gain peaking in the frequency
response, with overshoot and ringing in the step
response. A unity-gain buffer (G = +1) is the most
sensitive to capacitive loads, though all gains show the
same general behavior.
When driving large capacitive loads with these op
amps (e.g., > 100 pF when G = +1), a small series
resistor at the output (R
feedback loop’s phase margin (stability) by making the
output load resistive at higher frequencies. The
bandwidth will generally be lower than the bandwidth
with no capacitive load.
FIGURE 4-3:
stabilizes large capacitive loads.
Figure 4-4 gives recommended R
ent capacitive loads and gains. The x-axis is the
normalized load capacitance (C
circuit's noise gain. For non-inverting gains, G
Signal Gain are equal. For inverting gains, G
1+|Signal Gain| (e.g., -1 V/V gives G
DD
V
IN
V
= 5.5V. Refer to Figure 2-16 for more information.
IN
R IN
R IN
Rail-to-Rail Output
Capacitive Loads
L
DD
= 10 k
MCP6281/2/3/4/5
IN
– 15 mV (min.) and V
MCP628X
+
).
--------------------------------------------------------------------------------- -
R
V SS
----------------------------------------------------------------------------- -
Maximum expected V IN
IN
is connected to V
Minimum expected V IN
Input Current Limiting
Output Resistor, R
ISO
+
MCP628X
in Figure 4-3) improves the
2 mA
2 mA
R
L
ISO
/G
ISO
C
N
SS
), where G
N
DS21811D-page 11
L
values for differ-
+ 15 mV (max.)
= +2 V/V).
V DD
ISO
DD
N
V
/2 and
V
OUT
N
and the
OUT
is the
N
is

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