MCP6291-E/P Microchip Technology, MCP6291-E/P Datasheet - Page 14

• Manufacturer Part Number: MCP6291-E/P
• Description: IC OPAMP 2.4V SNGL R-R 8DIP
• Manufacturer: Microchip Technology

Specifications of MCP6291-E/P

• Slew Rate: 7 V/µs
• Amplifier Type: General Purpose
• Number Of Circuits: 1
• Output Type: Rail-to-Rail
• Gain Bandwidth Product: 10MHz
• Current - Input Bias: 1pA
• Voltage - Input Offset: 3000µV
• Current - Supply: 1mA
• Current - Output / Channel: 25mA
• Voltage - Supply, Single/dual (±): 2.4 V ~ 6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Through Hole
• Package / Case: 8-DIP (0.300", 7.62mm)
• Op Amp Type: General Purpose
• No. Of Amplifiers: 1
• Bandwidth: 10MHz
• Supply Voltage Range: 2.4V To 5.5V
• Amplifier Case Style: DIP
• No. Of Pins: 8
• Operating Temperature Range: -40°C To
• Number Of Channels: 1
• Voltage Gain Db: 110 dB
• Common Mode Rejection Ratio (min): 70 dB
• Input Offset Voltage: 3 mV
• Operating Supply Voltage: 3 V, 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: PIC16F690DM-PCTLHS - BOARD DEMO PICTAIL HUMIDITY SNSR
• -3db Bandwidth: -
• Lead Free Status / Rohs Status: Details

MCP6291/2/3/4/5
4.8.3
The MCP6295 provides the flexibility of Low-power
mode for dual op amps in an 8-pin package. The
MCP6295 eliminates the added cost and space in
battery-powered applications by using two single op
amps with Chip Select lines or a 10-pin device with one
Chip Select line for both op amps. Since the two op
amps are internally cascaded, this device cannot be
used in circuits that require active or passive elements
between the two op amps. However, there are several
applications where this op amp configuration with
Chip Select line becomes suitable. The circuits below
show possible applications for this device.
4.8.3.1
With the cascaded op amp configuration, op amp B can
be used to isolate the load from op amp A. In applica-
tions where op amp A is driving capacitive or low resis-
tance loads in the feedback loop (such as an integrator
circuit or filter circuit), the op amp may not have
sufficient source current to drive the load. In this case,
op amp B can be used as a buffer.
FIGURE 4-9:
Buffer.
4.8.3.2
Figure 4-10 shows a cascaded gain circuit configura-
tion with Chip Select. Op amps A and B are configured
in a non-inverting amplifier configuration. In this config-
uration, it is important to note that the input offset volt-
age of op amp A is amplified by the gain of op amp A
and B, as shown below:
Therefore, it is recommended to set most of the gain
with op amp A and use op amp B with relatively small
gain (e.g., a unity-gain buffer).
DS21812D-page 14
Where:
V
V
V
OUT
OSA
OSB
G
G
A
B
=
CASCADED OP AMP
APPLICATIONS
A
= op amp A gain
= op amp B gain
= op amp A input offset voltage
= op amp B input offset voltage
Load Isolation
Cascaded Gain
V
IN
G
A
MCP6295
G
B
Isolating the Load with a
CS
+
V
OSA
G
A
G
B
B
+
V
OSB
Load
G
V
B
OUTB
FIGURE 4-10:
Configuration.
4.8.3.3
Figure 4-11 shows op amp A as a difference amplifier
with Chip Select. In this configuration, it is recom-
mended to use well-matched resistors (e.g., 0.1%) to
increase the Common Mode Rejection Ratio (CMRR).
Op amp B can be used for additional gain or as a unity-
gain buffer to isolate the load from the difference
amplifier.
FIGURE 4-11:
V
V
IN2
IN1
R
V
4
IN
R
R
R
2
2
1
Difference Amplifier
A
R
3
R
A
1
MCP6295
Cascaded Gain Circuit
Difference Amplifier Circuit.
 2004 Microchip Technology Inc.
MCP6295
CS
CS
R
R
4
2
R
R
B
1
B
3
V
V
OUT
OUT