MCP6074-E/SL Microchip Technology, MCP6074-E/SL Datasheet - Page 17
![IC OPAMP 1.2MHZ 1.8V 14-SOIC](/photos/6/59/65933/150-14-soic_sml.jpg)
MCP6074-E/SL
Manufacturer Part Number
MCP6074-E/SL
Description
IC OPAMP 1.2MHZ 1.8V 14-SOIC
Manufacturer
Microchip Technology
Specifications of MCP6074-E/SL
Slew Rate
0.5 V/µs
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Amplifier Type
General Purpose
Number Of Circuits
4
Output Type
Rail-to-Rail
Gain Bandwidth Product
1.2MHz
Current - Input Bias
1pA
Voltage - Input Offset
150µV
Current - Supply
110µA
Current - Output / Channel
28mA
Voltage - Supply, Single/dual (±)
1.8 V ~ 6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Number Of Channels
4
Common Mode Rejection Ratio (min)
72 dB
Input Offset Voltage
0.15 mV
Input Bias Current (max)
100 pA
Operating Supply Voltage
3 V, 5 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Shutdown
No
Supply Voltage (max)
6 V
Supply Voltage (min)
1.8 V
Technology
CMOS
Voltage Gain Db
115 dB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
-3db Bandwidth
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCP6074-E/SL
Manufacturer:
MICROCHIP
Quantity:
1 300
Company:
Part Number:
MCP6074-E/SL
Manufacturer:
Microchip Technology
Quantity:
1 943
Part Number:
MCP6074-E/SL
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
4.6
In applications where low input bias current is critical,
Printed Circuit Board (PCB) surface leakage effects
need to be considered. Surface leakage is caused by
humidity, dust or other contamination on the board.
Under low humidity conditions, a typical resistance
between nearby traces is 10
cause 5 pA of current to flow; which is greater than the
MCP6071/2/4 family’s bias current at +25°C (±1.0 pA,
typical).
The easiest way to reduce surface leakage is to use a
guard ring around sensitive pins (or traces). The guard
ring is biased at the same voltage as the sensitive pin.
An example of this type of layout is shown in
Figure
FIGURE 4-6:
for Inverting Gain.
1.
2.
© 2009 Microchip Technology Inc.
Non-inverting Gain and Unity-Gain Buffer:
a.
b.
Inverting Gain and Transimpedance Gain Ampli-
fiers (convert current to voltage, such as photo
detectors):
a.
b.
Guard Ring
4-6.
PCB Surface Leakage
Connect the non-inverting pin (V
input with a wire that does not touch the
PCB surface.
Connect the guard ring to the inverting input
pin (V
common mode input voltage.
Connect the guard ring to the non-inverting
input pin (V
to the same reference voltage as the op
amp (e.g., V
Connect the inverting pin (V
with a wire that does not touch the PCB
surface.
IN
–). This biases the guard ring to the
IN
DD
+). This biases the guard ring
Example Guard Ring Layout
/2 or ground).
V
IN
12
– V
Ω. A 5V difference would
IN
+
IN
–) to the input
V
SS
IN
+) to the
MCP6071/2/4
DS22142A-page 17