MCP6074-E/ST Microchip Technology, MCP6074-E/ST Datasheet - Page 15

• Manufacturer Part Number: MCP6074-E/ST
• Description: IC OPAMP 1.2MHZ 1.8V 14-TSSOP
• Manufacturer: Microchip Technology

Specifications of MCP6074-E/ST

• Slew Rate: 0.5 V/µs
• Package / Case: 14-TSSOP
• Amplifier Type: General Purpose
• Number Of Circuits: 4
• Output Type: Rail-to-Rail
• Gain Bandwidth Product: 1.2MHz
• Current - Input Bias: 1pA
• Voltage - Input Offset: 150µV
• Current - Supply: 110µA
• Current - Output / Channel: 28mA
• Voltage - Supply, Single/dual (±): 1.8 V ~ 6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Number Of Channels: 4
• Common Mode Rejection Ratio (min): 72 dB
• Input Voltage Range (max): 6 V
• Input Voltage Range (min): 1.8 V
• Input Offset Voltage: 0.15 mV
• Input Bias Current (max): 100 pA
• Output Current (typ): 30 mA
• Operating Supply Voltage: 3 V, 5 V
• Supply Current: 110 uA
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Shutdown: No
• Supply Voltage (max): 6 V
• Supply Voltage (min): 1.8 V
• Technology: CMOS
• Voltage Gain Db: 115 dB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• -3db Bandwidth: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.0
The MCP6071/2/4 family of op amps is manufactured
using Microchip’s state-of-the-art CMOS process and
is specifically designed for low-power, high precision
applications.
4.1
4.1.1
The MCP6071/2/4 op amps are designed to prevent
phase reversal when the input pins exceed the supply
voltages.
ing the supply voltage without any phase reversal.
4.1.2
The ESD protection on the inputs can be depicted as
shown in
protect the input transistors and to minimize input bias
current (I
when they try to go more than one diode drop below
V
V
normal operation and low enough to bypass ESD
events within the specified limits.
FIGURE 4-1:
Structures.
In order to prevent damage and/or improper operation
of these op amps, the circuit they are in must limit the
voltages and currents at the V
Absolute Maximum Ratings at the beginning of
Section 1.0 “Electrical Characteristics”).
shows the recommended approach to protecting these
inputs. The internal ESD diodes prevent the input pins
(V
the resistors R
out of the input pins. Diodes D
input pins (V
When implemented as shown, resistors R
limit the current through D
© 2009 Microchip Technology Inc.
SS
DD
IN+
. They also clamp any voltage that go too far above
; their breakdown voltage is high enough to allow
V
V
V
and V
IN
DD
SS
+
APPLICATION INFORMATION
Rail-to-Rail Input
B
Figure 2-34
). The input ESD diodes clamp the inputs
Figure
Bond
Bond
Bond
PHASE REVERASAL
INPUT VOLTAGE AND CURRENT
LIMITS
Pad
Pad
Pad
IN-
IN+
) from going too far below ground, and
1
and V
and R
4-1. This structure was chosen to
IN-
shows the input voltage exceed-
2
Simplified Analog Input ESD
limit the possible current drawn
) from going too far above V
Stage
Input
1
and D
IN+
1
2
and D
.
and V
Bond
Pad
2
1
IN-
prevent the
and R
Figure 4-2
V
pins (see
IN
–
2
also
DD
.
FIGURE 4-2:
Inputs.
It is also possible to connect the diodes to the left of the
resistors R
the diodes D
mechanism. The resistors then serve as in-rush current
limiters; the DC currents into the input pins (V
V
current can flow out of the inputs when the common
mode voltage (V
Figure
4.1.3
The input stage of the MCP6071/2/4 op amps uses two
differential input stages in parallel. One operates at a
low common mode input voltage (V
operates at a high V
operates with a V
300 mV below V
voltage is measured at V
V
The transition between the input stages occurs when
V
Figure
gain linearity, with non-inverting gains, avoid this region
of operation.
4.2
The output voltage range of the MCP6071/2/4 op amps
is V
mum) when R
V
information.
IN-
DD
CM
DD
) should be very small. A significant amount of
SS
+ 0.3V to ensure proper operation.
= 6.0V. Refer to
is near V
V
V
2-36).
2-6). For the best distortion performance and
+ 15 mV (minimum) and V
1
2
Rail-to-Rail Output
R
R
1
1
2
NORMAL OPERATION
and R
1
>
>
and D
R
R
V
V
L
1
2
DD
D
SS
SS
SS
= 10 kΩ is connected to V
1
CM
2
CM
. (See
– (minimum expected V
– (minimum expected V
– 1.1V (See
. In this case, the currents through
2
MCP6071/2/4
CM
) is below ground (V
Figures 2-27
need to be limited by some other
D
Protecting the Analog
up to 300 mV above V
. With this topology, the device
2
Figure
2 mA
2 mA
CM
MCP607X
2-13) .The input offset
Figures
V
= V
R
DD
CM
and
DD
3
DS22142A-page 15
), while the other
– 15 mV (maxi-
SS
2-28
2-4,
– 0.3V and
1
2
)
)
SS
DD
for more
2-5
). (See
IN+
DD
/2 and
and
and
and