MAX4246AUA+ Maxim Integrated Products, MAX4246AUA+ Datasheet - Page 9

IC OP AMP LOW POWER 8-UMAX

MAX4246AUA+

Manufacturer Part Number
MAX4246AUA+
Description
IC OP AMP LOW POWER 8-UMAX
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX4246AUA+

Amplifier Type
General Purpose
Number Of Circuits
2
Output Type
Rail-to-Rail
Slew Rate
0.4 V/µs
Gain Bandwidth Product
1MHz
Current - Input Bias
10nA
Voltage - Input Offset
400µV
Current - Supply
375µA
Current - Output / Channel
30mA
Voltage - Supply, Single/dual (±)
2.5 V ~ 5.5 V, ±1.25 V ~ 2.75 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
-3db Bandwidth
-
Lead Free Status / Rohs Status
 Details
Figure 5. Shutdown Waveform
(Figures 6a, 6b, 6c). Note that this alternative results in
a loss of gain accuracy because R
divider with the R
The MAX4245/MAX4246/MAX4247 family operates from
either a single +2.5V to +5.5V supply or dual ±1.25V to
±2.75V supplies. For single-supply operation, bypass
the power supply with a 100nF capacitor to V
case GND). For dual-supply operation, both the V
and the V
with separate 100nF capacitors.
Good PC board layout techniques optimize perfor-
mance by decreasing the amount of stray capacitance
at the op amp’s inputs and output. To decrease stray
capacitance, minimize trace lengths and widths by
placing external components as close to the device as
possible. Use surface-mount components when possible.
Pin Configurations (continued)
SHDN
OUT
Power-Supply Bypassing and Layout
TOP VIEW
SS
supplies should be bypassed to ground
SHDNA
OUTA
INA+
INA-
Single-/Dual-Supply, Low-Power Op Amps
V
LOAD
SS
Ultra-Small, Rail-to-Rail I/O with Disable,
_______________________________________________________________________________________
5
1
2
3
4
.
400 s/div
MAX
MAX4247
ISO
10
9
8
7
6
forms a voltage
V
OUTB
INB-
INB+
SHDNB
DD
2V/div
2V/div
SS
(in this
DD
MAX4245 TRANSISTOR COUNT: 207
MAX4246/MAX4247 TRANSISTOR COUNT: 414
PROCESS: BiCMOS
Figure 6c. Pulse Response With Isolating Resistor
Figure 6a. Using a Resistor to Isolate a Capacitive Load from
the Op Amp
Figure 6b. Pulse Response Without Isolating Resistor
OUT
OUT
IN
IN
IN
R
R
C
R
R
C
ISO
L
L
ISO
L
L
= 2k
= 2200pF
= 2k
= 2200pF
= 100
= 0
10 s/div
10 s/div
R
ISO
Chip Information
R
L
C
L
100mV/div
100mV/div
100mV/div
100mV/div
OUT
9

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