MCP6141-I/SN Microchip Technology, MCP6141-I/SN Datasheet - Page 18
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MCP6141-I/SN
Manufacturer Part Number
MCP6141-I/SN
Description
IC OPAMP 1.4V SINGLE R-R 8-SOIC
Manufacturer
Microchip Technology
Specifications of MCP6141-I/SN
Slew Rate
0.003 V/µs
Amplifier Type
General Purpose
Number Of Circuits
1
Output Type
Rail-to-Rail
Gain Bandwidth Product
100kHz
Current - Input Bias
1pA
Voltage - Input Offset
3000µV
Current - Supply
0.6µA
Current - Output / Channel
20mA
Voltage - Supply, Single/dual (±)
1.4 V ~ 6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Op Amp Type
Non Unity Gain Stable
No. Of Amplifiers
1
Bandwidth
100kHz
Supply Voltage Range
1.4V To 5.5V
Amplifier Case Style
SOIC
No. Of Pins
8
Number Of Channels
1
Voltage Gain Db
115 dB
Common Mode Rejection Ratio (min)
60 dB
Input Offset Voltage
3 mV
Operating Supply Voltage
3 V, 5 V
Supply Current
0.001 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
-3db Bandwidth
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCP6141-I/SN
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
MCP6141/2/3/4
4.6
With this family of operational amplifiers, the power
supply pin (V
bypass capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm
for good high frequency performance. It can use a bulk
capacitor (i.e., 1 µF or larger) within 100 mm to provide
large, slow currents. This bulk capacitor is not required
for most applications and can be shared with other
nearby analog parts.
4.7
An unused op amp in a quad package (MCP6144)
should be configured as shown in
circuits prevent the output from toggling and causing
crosstalk.
Circuits A sets the op amp near its minimum noise gain.
The resistor divider produces any desired reference
voltage within the output voltage range of the op amp;
the op amp buffers that reference voltage. Circuit B
uses the minimum number of components and
operates as a comparator, but it may draw more
current.
FIGURE 4-8:
4.8
In applications where low input bias current is critical,
printed circuit board (PCB) surface leakage effects
need to be considered. Surface leakage is caused by
humidity, dust or other contamination on the board.
Under low humidity conditions, a typical resistance
between nearby traces is 10
cause 5 pA of current to flow, which is greater than the
MCP6141/2/3/4 family’s bias current at +25°C (1 pA,
typical).
The easiest way to reduce surface leakage is to use a
guard ring around sensitive pins (or traces). The guard
ring is biased at the same voltage as the sensitive pin.
An example of this type of layout is shown in
Figure
DS21668D-page 18
V
DD
R
R
4-9.
1
R
2
Supply Bypass
Unused Op Amps
¼ MCP6144 (A)
PCB Surface Leakage
V REF
DD
10R
V
DD
=
for single supply) should have a local
V DD
Unused Op Amps.
⋅
V
--------------------
R 1
REF
12
R 2
+
Ω. A 5V difference would
R 2
Figure
¼ MCP6144 (B)
V
4-8. These
DD
FIGURE 4-9:
for Inverting Gain.
1.
2.
Non-inverting Gain and Unity Gain Buffer:
a)
b)
Inverting Gain and Transimpedance Gain
(convert current to voltage, such as photo
detectors) amplifiers:
a)
b)
Connect the non-inverting pin (V
input with a wire that does not touch the
PCB surface.
Connect the guard ring to the inverting input
pin (V
common mode input voltage.
Connect the guard ring to the non-inverting
input pin (V
to the same reference voltage as the op
amp (e.g., V
Connect the inverting pin (V
with a wire that does not touch the PCB
surface.
Guard Ring
IN
–). This biases the guard ring to the
IN
DD
+). This biases the guard ring
Example Guard Ring Layout
© 2009 Microchip Technology Inc.
/2 or ground).
V
IN
– V
IN
+
IN
–) to the input
IN
+) to the