LTC1250CS8#TR Linear Technology, LTC1250CS8#TR Datasheet - Page 7

IC AMP BRIDGE ZERO DRFT LN 8SOIC

LTC1250CS8#TR

Manufacturer Part Number
LTC1250CS8#TR
Description
IC AMP BRIDGE ZERO DRFT LN 8SOIC
Manufacturer
Linear Technology
Datasheet

Specifications of LTC1250CS8#TR

Amplifier Type
Chopper (Zero-Drift)
Number Of Circuits
1
Output Type
Rail-to-Rail
Slew Rate
10 V/µs
Gain Bandwidth Product
1.5MHz
Current - Input Bias
50pA
Voltage - Input Offset
5µV
Current - Supply
3mA
Voltage - Supply, Single/dual (±)
4.75 V ~ 16 V, ±2.38 V ~ 8 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Current - Output / Channel
-
-3db Bandwidth
-

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A
LTC1250 and on the PC board, play an increasing role.
Low value resistors (below 5k) may not require a capaci-
tor at all.
Input Bias Current
The inputs of the LTC1250, like all zero-drift op amps,
draw only small switching spikes of AC bias current; DC
leakage current is negligible except at very high tempera-
tures. The large front-end transistors cause switching
spikes 3 to 4 times greater than standard zero-drift op
amps: the ±50pA bias current spec is still many times
better than most bipolar parts. The spikes don’t match
from one input pin to the other, and are sometimes (but
not always) of opposite polarity. As a result, matching the
impedances at the inputs (Figure 3) will not cancel the
bias current, and may cause additional errors. Don’t do it.
Output Drive
The LTC1250 includes an enhanced output stage which
provides nearly symmetrical output source/sink currents.
This output is capable of swinging a minimum of ±4V into
a 1k load with ±5V supplies, and can sink or source >20mA
into low impedance loads. Lightly loaded (R
LTC1250 will swing to within millivolts of either rail. In
single supply applications, it will typically swing 4.3V into
a 1k load with a 5V supply.
Minimizing External Errors
The input noise, offset voltage, and bias current specs for
the LTC1250 are all well below the levels of circuit board
parasitics. Thermocouples between the copper pins of the
LTC1250 and the tin/lead solder used to connect them can
overwhelm the offset voltage of the LTC1250, especially
if a soldering iron has been around recently. Note also that
Figure 3. Extra Resistor Will Not Cancel Bias Current Errors
PPLICATI
R
IN
O
U
S
I FOR ATIO
+
U
LTC1250
R
F
W
1250 F03
L
≥100k), the
U
when the LTC1250’s output is heavily loaded, the chip
may dissipate substantial power, raising the temperature
of the package and aggravating thermocouples at the
inputs. Although the LTC1250 will maintain its specified
accuracy under these conditions, care must be taken in
the layout to prevent or compensate circuit errors. Be
especially careful of air currents when measuring low
frequency noise; nearby moving objects (like people) can
create very large noise peaks with an unshielded circuit
board. For more detailed explanations and advice on how
to avoid these errors, see the LTC1051/LTC1053 data
sheet.
Sampling Behavior
The LTC1250’s zero-drift nulling loop samples the input at
≈ 5kHz, allowing it to process signals below 2kHz with no
aliasing. Signals above this frequency may show aliasing
behavior, although wideband internal circuitry generally
keeps errors to a minimum. The output of the LTC1250
will have small spikes at the clock frequency and its
harmonics; these will vary in amplitude with different
feedback configurations. Low frequency or band-limited
systems should not be affected, but systems with higher
bandwidth (oversampling A/Ds, for example) may need to
filter out these clock artifacts. Output spikes can be
minimized with a large feedback capacitor, but this will
adversely affect noise performance (see Input Capaci-
tance and Compensation on the previous page). Applica-
tions which require spike-free output in addition to mini-
mum noise will need a low-pass filter after the LTC1250;
a simple RC will usually do the job (Figure 4). The
LTC1051/LTC1053 data sheet includes more information
about zero-drift amplifier sampling behavior.
Figure 4. RC Output Pole Limits Bandwidth to 330Hz
+
LTC1250
C
R
F
F
47k
LTC1250
0.01
1250 F04
1250fb
7

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