LTC6404HUD-2#TRPBF Linear Technology, LTC6404HUD-2#TRPBF Datasheet - Page 27

• Manufacturer Part Number: LTC6404HUD-2#TRPBF
• Description: IC AMP/DRIVER DIFF 16-QFN
• Manufacturer: Linear Technology
• Type: ADC Driverr

Specifications of LTC6404HUD-2#TRPBF

• Applications: Data Acquisition
• Mounting Type: Surface Mount
• Package / Case: 16-WQFN Exposed Pad
• Current - Supply: 30.4mA
• Operating Temperature: -40°C ~ 125°C
• Output Type: Differential, Rail-to-Rail
• Number Of Circuits: 1
• Current - Output / Channel: 85mA
• Amplifier Type: Differential
• Voltage - Supply, Single/dual (±): 2.7 V ~ 5.5 V, ±1.35 V ~ 2.75 V
• -3db Bandwidth: 600MHz
• Slew Rate: 700 V/µs
• Gain Bandwidth Product: 900MHz
• Current - Input Bias: 23µA
• Voltage - Input Offset: 500µV
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PACKAGE DESCRIPTION
will create a voltage divider between the dynamic input
impedance of the ADC and the decoupling resistors.
Choosing too small of a resistor will possibly prevent the
resistor from properly damping the load transient caused
by the sampling process, prolonging the time required for
APPLICATIONS INFORMATION
3.50 ± 0.05
2.10 ± 0.05
1.45 ± 0.05
(4 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
NOTE:
1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
ON THE TOP AND BOTTOM OF PACKAGE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
PIN 1
TOP MARK
(NOTE 6)
3.00 ± 0.10
(4 SIDES)
16-Lead Plastic QFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1691)
0.50 BSC
0.25 ±0.05
0.70 ±0.05
PACKAGE OUTLINE
UD Package
0.75 ± 0.05
settling. 16-bit applications typically require a minimum
of 11 R-C time constants. It is recommended that the ca-
pacitor chosen have a high quality dielectric (for example,
C0G multilayer ceramic).
1.45 ± 0.10
(4-SIDES)
0.200 REF
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
R = 0.115
TYP
15 16
0.50 BSC
0.25 ± 0.05
1
2
(UD16) QFN 0904
0.40 ± 0.10
PIN 1 NOTCH R = 0.20 TYP
OR 0.25 × 45° CHAMFER
LTC6404
27
6404f