LT1367CS#TR Linear Technology, LT1367CS#TR Datasheet - Page 12
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LT1367CS#TR
Manufacturer Part Number
LT1367CS#TR
Description
IC OPAMP QUAD R-R I/O 14SOIC
Manufacturer
Linear Technology
Datasheet
1.LT1368CN8PBF.pdf
(20 pages)
Specifications of LT1367CS#TR
Amplifier Type
General Purpose
Number Of Circuits
4
Output Type
Rail-to-Rail
Slew Rate
0.13 V/µs
Gain Bandwidth Product
400kHz
Current - Input Bias
10nA
Voltage - Input Offset
200µV
Current - Supply
370µA
Current - Output / Channel
75mA
Voltage - Supply, Single/dual (±)
1.8 V ~ 30 V, ±0.9 V ~ 15 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
-3db Bandwidth
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
LT1366/LT1367
LT1368/LT1369
applicaTions inForMaTion
Technology’s proprietary complementary bipolar process,
which ensures very similar DC and AC characteristics for
the output devices Q24 and Q26.
A simple comparator Q5 steers current from current source
I
mode voltage V
verse biased, and I
differential pair Q1/Q2. At the other extreme, when V
is within about 1.3V from the positive supply, Q5 diverts
I
current for the NPN differential pair Q3/Q4.
The collector currents of the two input pairs are combined
in the second stage, consisting of Q7 through Q11. Most
of the voltage gain in the amplifier is contained in this
stage. Differential amplifier Q14/Q15 buffers the output
of the second stage, converting the output voltage to dif-
ferential currents. The differential currents pass through
current mirrors D4/Q17 and D5/Q16, and are converted to
differential voltages by Q18 and Q19. These voltages are
also buffered and applied to the output Darlington pairs
Q23/Q24 and Q25/Q26. Capacitors C1 and C2 form local
feedback loops around the output devices, lowering the
output impedance at high frequencies.
Input Offset Voltage
Since the amplifier has two input stages, the input offset
voltage changes depending upon which stage is active.
The input offsets are random, but bounded voltages. When
the amplifier switches between stages, offset voltages
may go up, down, or remain flat; but will not exceed the
guaranteed limits. This behavior is illustrated in three
distribution plots of input offset voltage in the Typical
Performance Characteristics section.
Overdrive Protection
Two circuits prevent the output from reversing polarity
when the input voltage exceeds the common mode range.
When the noninverting input exceeds the positive supply
by approximately 300mV, the clamp transistor Q12 (Fig-
ure 1) turns on, pulling the output of the second stage
low, which forces the output high. For inputs below the
negative supply, diodes D1 and D2 turn on, overcoming
the saturation of the input pair Q1/Q2.
1
1
between the two input stages. When the input common
to the current mirror D3/Q6, which furnishes the tail
CM
1
is near the negative supply, Q5 is re-
becomes the tail current for the PNP
CM
When overdriven, the amplifier draws input current that
exceeds the normal input bias current. Figures 2 and 3
show some typical overdrive currents as a function of
input voltage. The input current must be less than 1mA of
positive overdrive or less than 7mA of negative overdrive,
for the phase reversal protection to work properly. When
the amplifier is severely overdriven, an external resistor
should be used to limit the overdrive current. In addition
to overdrive protection, the amplifier is protected against
ESD strokes up to 4kV on all pins.
Figure 2. Input Bias Current vs Common Mode Voltage
Figure 3. Input Bias Current vs Common Mode Voltage
–100
–110
–50
–90
110
100
–10
–20
–30
–40
–60
–70
–80
90
80
70
60
50
40
30
20
10
0
–500
0
–800
T = –55°C T = 25°C
MEASURED AS A FOLLOWER
COMMON MODE VOLTAGE RELATIVE TO
COMMON MODE VOLTAGE RELATIVE TO
MEASURED AS A
+
–
FOLLOWER
–600
–300
+
–
NEGATIVE SUPPLY (mV)
T = 70°C
POSITIVE SUPPLY (mV)
–100 V
–400
T = 85°C
S
–200
100
T = 85°C
T = 70°C
T = –55°C
300
V
T = 25°C
S
LT1366 F02
LT1366 F03
500
200
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