LT1210CR Linear Technology, LT1210CR Datasheet - Page 8
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LT1210CR
Manufacturer Part Number
LT1210CR
Description
IC 35MHZ 1.1 AMP AMPLIFIER 7 DD
Manufacturer
Linear Technology
Datasheet
1.LT1210CT7PBF.pdf
(16 pages)
Specifications of LT1210CR
Amplifier Type
Current Feedback
Number Of Circuits
1
Slew Rate
90 V/µs
-3db Bandwidth
55MHz
Current - Input Bias
10µA
Voltage - Input Offset
3000µV
Current - Supply
35mA
Current - Output / Channel
2A
Voltage - Supply, Single/dual (±)
10 V ~ 30 V, ±5 V ~ 15 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
TO-263-7, D²Pak (7 leads + Tab), TO-263CA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Output Type
-
Gain Bandwidth Product
-
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Price
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LT1210
A
The LT1210 is a current feedback amplifier with high
output current drive capability. The device is stable with
large capacitive loads and can easily supply the high
currents required by capacitive loads. The amplifier will
drive low impedance loads such as cables with excellent
linearity at high frequencies.
Feedback Resistor Selection
The optimum value for the feedback resistors is a function
of the operating conditions of the device, the load imped-
ance and the desired flatness of response. The Typical AC
Performance tables give the values which result in less
than 1dB of peaking for various resistive loads and oper-
ating conditions. If this level of flatness is not required, a
higher bandwidth can be obtained by use of a lower
feedback resistor. The characteristic curves of Bandwidth
vs Supply Voltage indicate feedback resistors for peaking
up to 5dB. These curves use a solid line when the response
has less than 1dB of peaking and a dashed line when the
response has 1dB to 5dB of peaking. The curves stop
where the response has more than 5dB of peaking.
For resistive loads, the COMP pin should be left open (see
Capacitive Loads section).
Capacitive Loads
The LT1210 includes an optional compensation network
for driving capacitive loads. This network eliminates most
of the output stage peaking associated with capacitive
loads, allowing the frequency response to be flattened.
Figure 1 shows the effect of the network on a 200pF load.
Without the optional compensation, there is a 6dB peak at
40MHz caused by the effect of the capacitance on the
output stage. Adding a 0.01µF bypass capacitor between
the output and the COMP pins connects the compensation
and greatly reduces the peaking. A lower value feedback
resistor can now be used, resulting in a response which is
flat to ±1dB to 40MHz. The network has the greatest effect
for C
Bandwidth and Feedback Resistance vs Capacitive Load
can be used to select the appropriate value of feedback
resistor. The values shown are for 1dB and 5dB peaking at
a gain of 2 with no resistive load. This is a worst-case
condition, as the amplifier is more stable at higher gains
and with some resistive load in parallel with the capaci-
8
PPLICATI
L
in the range of 0pF to 1000pF. The graphs of
O
U
S
I FOR ATIO
U
W
U
tance. Also shown is the – 3dB bandwidth with the sug-
gested feedback resistor vs the load capacitance.
Although the optional compensation works well with
capacitive loads, it simply reduces the bandwidth when it
is connected with resistive loads. For instance, with a 10Ω
load, the bandwidth drops from 35MHz to 26MHz when
the compensation is connected. Hence, the compensation
was made optional. To disconnect the optional compensa-
tion, leave the COMP pin open.
Shutdown/Current Set
If the shutdown feature is not used, the SHUTDOWN pin
must be connected to ground or V
The Shutdown pin can be used to either turn off the biasing
for the amplifier, reducing the quiescent current to less
than 200µA, or to control the quiescent current in normal
operation.
The total bias current in the LT1210 is controlled by the
current flowing out of the Shutdown pin. When the Shut-
down pin is open or driven to the positive supply, the part
is shut down. In the shutdown mode, the output looks like
a 70pF capacitor and the supply current is typically less
than 100µA. The Shutdown pin is referenced to the posi-
tive supply through an internal bias circuit (see the Simpli-
fied Schematic). An easy way to force shutdown is to use
open-drain (collector) logic. The circuit shown in Figure 2
uses a 74C904 buffer to interface between 5V logic and the
LT1210. The switching time between the active and shut-
down states is about 1µs. A 24k pull-up resistor speeds
–2
–4
–6
14
12
10
8
6
4
2
0
1
V
C
S
L
= 200pF
= ±15V
COMPENSATION
R
F
= 1.5k
FREQUENCY (MHz)
NO COMPENSATION
Figure 1
COMPENSATION
10
R
F
R
= 3.4k
F
= 3.4k
–
.
1210 F01
100
1210fa