LT6604CUFF-10#PBF Linear Technology, LT6604CUFF-10#PBF Datasheet - Page 7

IC AMP DIFF LN DUAL 34-QFN

LT6604CUFF-10#PBF

Manufacturer Part Number
LT6604CUFF-10#PBF
Description
IC AMP DIFF LN DUAL 34-QFN
Manufacturer
Linear Technology
Datasheet

Specifications of LT6604CUFF-10#PBF

Amplifier Type
Differential
Number Of Circuits
2
Output Type
Differential
Current - Input Bias
40µA
Voltage - Input Offset
8000µV
Current - Supply
36mA
Voltage - Supply, Single/dual (±)
3 V ~ 11 V, ±1.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
34-QFN
No. Of Amplifiers
2
Input Offset Voltage
35mV
Bandwidth
10MHz
Supply Voltage Range
3V To 11V
Supply Current
36mA
Amplifier Case Style
QFN
No. Of Pins
34
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output / Channel
-
-3db Bandwidth
-
Slew Rate
-
Gain Bandwidth Product
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LT6604CUFF-10#PBFLT6604CUFF-10
Manufacturer:
LT
Quantity:
10 000
PIN FUNCTIONS
+INA and –INA (Pins 2, 4): Channel A Input Pins. Signals
can be applied to either or both input pins through identi-
cal external resistors, R
inputs to the differential outputs is 402Ω/R
V
for the 2nd Filter Stage in Channel A. Its value programs
the common mode voltage of the differential output of
the fi lter. Pin 6 is a high impedance input, which can be
driven from an external voltage reference, or Pin 6 can be
tied to Pin 34 on the PC board. Pin 6 should be bypassed
with a 0.01μF ceramic capacitor unless it is connected to
a ground plane.
V
(can be ground).
V
ply, see the Block Diagram. For single supply operation
the V
ceramic capacitor to ground. For dual supply operation,
Pin 8 can be bypassed or connected to a high quality DC
ground. A ground plane should be used. A poor ground
will increase noise and distortion. Pin 8 sets the output
common mode voltage of the 1st fi lter stage in channel B.
It has a 5.5kΩ impedance, and it can be overridden with
an external low impedance voltage source.
+INB and –INB (Pins 10, 12): Channel B Input Pins. Signals
can be applied to either or both input pins through identi-
cal external resistors, R
inputs to the differential outputs is 402Ω/R
V
for the 2nd Filter Stage in Channel B. Its value programs
the common mode voltage of the differential output of
the fi lter. Pin 14 is a high impedance input, which can
be driven from an external voltage reference, or Pin 14
can be tied to Pin 8 on the PC board. Pin 14 should be
bypassed with a 0.01μF ceramic capacitor unless it is
connected to a ground plane.
MIDB
OCMA
OCMB
(Pins 7, 24, 31, 32, 35): Negative Power Supply Pin
MIDB
(Pin 8): The V
(Pin 14): DC Common Mode Reference Voltage
(Pin 6): DC Common Mode Reference Voltage
pin should be bypassed with a quality 0.01μF
MIDB
IN
IN
pin is internally biased at midsup-
. The DC gain from differential
. The DC gain from differential
IN
IN
.
.
V
Channels A and B. For a single 3.3V or 5V supply (Pins 7,
24, 31, 32 and 35 grounded) a quality 0.1μF ceramic
bypass capacitor is required from the positive supply pin
(Pins 25, 17) to the negative supply pin (Pins 7, 24, 31,
32 and 35). The bypass should be as close as possible to
the IC. For dual supply applications, bypass the negative
supply pins to ground and Pins 25 and 17 to ground with
a quality 0.1μF ceramic capacitor.
+OUTB and –OUTB (Pins 19, 21): Output Pins. Pins 19 and
21 are the fi lter differential outputs for channel B. With a
typical short-circuit current limit greater than ±40mA, each
pin can drive a 100Ω and/or 50pF load to AC ground.
+OUTA and –OUTA (Pins 27, 29): Output Pins. Pins 27 and
29 are the fi lter differential outputs for channel A. With a
typical short-circuit current limit greater than ±40mA, each
pin can drive a 100Ω and/or 50pF load to AC ground.
V
supply, see the Block Diagram. For single supply operation
the V
ceramic capacitor to ground. For dual supply operation,
Pin 34 can be bypassed or connected to a high quality DC
ground. A ground plane should be used. A poor ground
will increase noise and distortion. Pin 34 sets the output
common mode voltage of the 1st fi lter stage in channel A.
It has a 5.5kΩ impedance, and it can be overridden with
an external low impedance voltage source.
Exposed Pad (Pin 35): V
soldered to the PCB.
+
MIDA
A and V
MIDA
(Pin 34): The V
+
pin should be bypassed with a quality 0.01μF
B (Pins 25, 17): Positive Power Supply Pins for
MIDA
pin is internally biased at mid-
. The exposed pad must be
LT6604-10
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