AD8027AR-REEL7 Analog Devices Inc, AD8027AR-REEL7 Datasheet - Page 6

• Manufacturer Part Number: AD8027AR-REEL7
• Description: IC OPAMP R-R LDIST LN LP 8SOIC
• Manufacturer: Analog Devices Inc

Specifications of AD8027AR-REEL7

• Rohs Status: RoHS non-compliant
• Amplifier Type: Voltage Feedback
• Number Of Circuits: 1
• Output Type: Rail-to-Rail
• Slew Rate: 100 V/µs
• -3db Bandwidth: 190MHz
• Current - Input Bias: 4µA
• Voltage - Input Offset: 200µV
• Current - Supply: 6.5mA
• Current - Output / Channel: 120mA
• Voltage - Supply, Single/dual (±): 2.7 V ~ 12 V, ±1.35 V ~ 6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Gain Bandwidth Product: -

AD8027/AD8028
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter
Supply Voltage
Power Dissipation
Common-Mode Input Voltage
Differential Input Voltage
Storage Temperature
Operating Temperature Range
Lead Temperature Range
Junction Temperature
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation in the AD8027/AD8028
package is limited by the associated rise in junction temperature
(T
the junction temperature. At approximately 150°C, which is the
glass transition temperature, the plastic changes its properties.
Even temporarily exceeding this temperature limit may change
the stresses that the package exerts on the die, permanently
shifting the parametric performance of the AD8027/AD8028.
Exceeding a junction temperature of 175°C for an extended
period of time can result in changes in the silicon devices,
potentially causing failure.
The still-air thermal properties of the package and PCB (θ
ambient temperature (T
package (P
The junction temperature can be calculated as
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degrada-
tion or loss of functionality.
(Soldering 10 sec)
J
) on the die. The plastic encapsulating the die locally reaches
T
J
=
T
D
A
) determine the junction temperature of the die.
+
(
P
D
×
θ
JA
A
), and the total power dissipated in the
)
Rating
12.6 V
See Figure 3
±V
±1.8 V
–65°C to +125°C
–40°C to +125°C
300°C
150°C
S
± 0.5 V
JA
),
Rev. C | Page 6 of 24
The power dissipated in the package (P
quiescent power dissipation and the power dissipated in the
package due to the load drive for all outputs. The quiescent
power is the voltage between the supply pins (V
quiescent current (I
midsupply, then the total drive power is V
which is dissipated in the package and some in the load (V
I
power is the drive power dissipated in the package.
RMS output voltages should be considered. If R
to V
is V
If the rms signal levels are indeterminate, then consider the
worst case, when V
In single-supply operation with R
is V
Airflow increases heat dissipation, effectively reducing θ
more metal directly in contact with the package leads from
metal traces, through holes, ground, and power planes reduces
the θ
at the input leads of high speed op amps, as discussed in the
PCB Layout section.
OUT
). The difference between the total drive power and the load
S
OUT
S−
P
JA
P
× I
P
, as in single-supply operation, then the total drive power
D
D
D
. Care must be taken to minimize parasitic capacitances
= V
= Quiescent Power + (Total Drive Power − Load Power)
OUT
=
=
(
(
V
V
.
S
/2.
S
S
×
×
I
I
S
S
)
) (
+
OUT
S
+
). Assuming the load (R
⎛
⎜
⎜
⎝
V
V
2
= V
S
S
R
4 /
×
L
S
V
)
/4 for R
2
OUT
R
L
⎞
⎟
⎟
⎠
L
–
L
referenced to V
V
to midsupply.
OUT
R
D
L
) is the sum of the
S
2
/2 × I
L
) is referenced to
L
S
OUT
) times the
is referenced
S
–, worst case
, some of
JA
. Also,
OUT
×