AD8047AR-REEL Analog Devices Inc, AD8047AR-REEL Datasheet - Page 14
![IC OPAMP VF GP LDIST 50MA 8SOIC](/photos/5/66/56684/505-8-soic_sml.jpg)
AD8047AR-REEL
Manufacturer Part Number
AD8047AR-REEL
Description
IC OPAMP VF GP LDIST 50MA 8SOIC
Manufacturer
Analog Devices Inc
Datasheet
1.AD8048ARZ.pdf
(16 pages)
Specifications of AD8047AR-REEL
Rohs Status
RoHS non-compliant
Amplifier Type
Voltage Feedback
Number Of Circuits
1
Slew Rate
750 V/µs
-3db Bandwidth
250MHz
Current - Input Bias
1µA
Voltage - Input Offset
1000µV
Current - Supply
5.8mA
Current - Output / Channel
50mA
Voltage - Supply, Single/dual (±)
6 V ~ 12 V, ±3 V ~ 6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Output Type
-
Gain Bandwidth Product
-
AD8047/AD8048
Choose
F
H = Absolute Value of Circuit Gain =
Then,
A/D Converter Driver
As A/D converters move toward higher speeds with higher reso-
lutions, there becomes a need for high performance drivers that
will not degrade the analog signal to the converter. It is desir-
able from a system’s standpoint that the A/D be the element in
the signal chain that ultimately limits overall distortion. This
places new demands on the amplifiers used to drive fast, high
resolution A/Ds.
With high bandwidth, low distortion, and fast settling time,
the AD8047 and AD8048 make high performance A/D drivers
for advanced converters. Figure 12 is an example of an AD8047
used as an input driver for an AD872A, a 12-bit, 10 MSPS
A/D converter.
O
= Damping Ratio = 1/Q = 2
= Cutoff Frequency = 20 MHz
ANALOG IN
Figure 12. AD8047 Used as Driver for an AD872A, a 12-Bit, 10 MSPS A/D Converter
k 2
C2
R1
R3
R4
2
3
+5V ANALOG
AD8047
ANALOG
2 HK
–5V
4 C1(H 1)
2 K (H 1)
H(R1)
7
4
F
O
0.1 F
10 F
C1
2
6
10 F
0.1 F
–R4
R1
= 1
+5V ANALOG
0.1 F
0.1 F
1 F
26
27
28
4
5
1
2
0.1 F
AV
AGND
V
–14–
V
REF GND
REF OUT
REF IN
INA
INB
DD
AV
–5V ANALOG
AD872A
SS
Layout Considerations
The specified high speed performance of the AD8047 and
AD8048 requires careful attention to board layout and compo-
nent selection. Proper RF design techniques and low-pass
parasitic component selection are mandatory.
The PCB should have a ground plane covering all unused por-
tions of the component side of the board to provide a low
impedance path. The ground plane should be removed from the
area near the input pins to reduce stray capacitance.
Chip capacitors should be used for the supply bypassing (see
Figure 12). One end should be connected to the ground plane
and the other within 1/8 inch of each power pin. An additional
large (0.47 F to 10 F) tantalum electrolytic capacitor should
be connected in parallel, though not necessarily so close, to the
supply current for fast, large signal changes at the output.
The feedback resistor should be located close to the inverting
input pin in order to keep the stray capacitance at this node to a
minimum. Capacitance variations of less than 1 pF at the inverting
input will significantly affect high speed performance.
Stripline design techniques should be used for long signal traces
(greater than about 1 inch). These should be designed with a
characteristic impedance of 50
nated at each end.
3
AV
DRGND
DRV
DV
DGND
SS
AGND
BIT10
BIT11
BIT12
OTR
25
BIT2
BIT3
BIT4
BIT5
BIT6
BIT7
BIT8
BIT9
CLK
MSB
0.1 F
DD
DD
19
18
6
22
23
21
20
17
16
15
14
13
12
7
11
10
9
8
24
+5V DIGITAL
0.1 F
0.1 F
10
+5V DIGITAL
DIGITAL OUTPUT
or 75
49.9
CLOCK INPUT
and be properly termi-
REV. A