LPC661AIM National Semiconductor, LPC661AIM Datasheet - Page 9

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LPC661AIM

Manufacturer Part Number
LPC661AIM
Description
IC OP AMP LOW PWR CMOS 8-SOIC
Manufacturer
National Semiconductor
Datasheet

Specifications of LPC661AIM

Amplifier Type
General Purpose
Number Of Circuits
1
Output Type
Rail-to-Rail
Slew Rate
0.11 V/µs
Gain Bandwidth Product
350kHz
Current - Input Bias
0.002pA
Voltage - Input Offset
1000µV
Current - Supply
58µA
Current - Output / Channel
40mA
Voltage - Supply, Single/dual (±)
4.75 V ~ 15.5 V, ±2.38 V ~ 7.75 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
-3db Bandwidth
-
Other names
*LPC661AIM
Application Hints
Capacitive load driving capability is enhanced by using a pull
up resistor to V
ducting 50 µA or more will significantly improve capacitive
load responses. The value of the pull up resistor must be de-
termined based on the current sinking capability of the ampli-
fier with respect to the desired output swing. Open loop gain
of the amplifier can also be affected by the pull up resistor
(see Electrical Characteristics).
FIGURE 2. Rx, Cx Improve Capacitive Load Tolerance
+
( Figure 3 ). Typically a pull up resistor con-
(Continued)
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PRINTED-CIRCUIT-BOARD LAYOUT
FOR HIGH-IMPEDANCE WORK
It is generally recognized that any circuit which must operate
with less than 1000 pA of leakage current requires special
layout of the PC board. When one wishes to take advantage
of the ultra-low bias current of the LPC661, typically less
than 0.04 pA, it is essential to have an excellent layout. For-
tunately, the techniques for obtaining low leakages are quite
simple. First, the user must not ignore the surface leakage of
the PC board, even though it may sometimes appear accept-
ably low, because under conditions of high humidity or dust
or contamination, the surface leakage will be appreciable.
To minimize the effect of any surface leakage, lay out a ring
of foil completely surrounding the LPC661’s inputs and the
terminals of capacitors, diodes, conductors, resistors, relay
terminals, etc. connected to the op-amp’s inputs. See Figure
4 . To have a significant effect, guard rings should be placed
on both the top and bottom of the PC board. This PC foil
must then be connected to a voltage which is at the same
voltage as the amplifier inputs, since no leakage current can
flow between two points at the same potential. For example,
a PC board trace-to-pad resistance of 10
mally considered a very large resistance, could leak 5 pA if
the trace were a 5V bus adjacent to the pad of an input. This
would cause a 100 times degradation from the LPC660’s ac-
tual performance. However, if a guard ring is held within
5 mV of the inputs, then even a resistance of 10
cause only 0.05 pA of leakage current, or perhaps a minor
(2:1) degradation of the amplifier’s performance. See Fig-
ures 5, 6, 7 for typical connections of guard rings for stan-
dard op-amp configurations. If both inputs are active and at
high impedance, the guard can be tied to ground and still
provide some protection; see Figure 8 .
Capacitive Loads with A Pull Up Resistor
FIGURE 3. Compensating for Large
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, which is nor-
www.national.com
11
would