LTC693CSW Linear Technology, LTC693CSW Datasheet - Page 9

• Manufacturer Part Number: LTC693CSW
• Description: IC MPU SUPERVISRY CIRCUIT 16SOIC
• Manufacturer: Linear Technology
• Type: Simple Reset/Power-On Resetr

Specifications of LTC693CSW

• Number Of Voltages Monitored: 1
• Output: Open Drain or Open Collector
• Reset: Active High/Active Low
• Reset Timeout: 140 ms Minimum
• Voltage - Threshold: 4.4V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: LTC693CS

APPLICATIONS INFORMATION
Microprocessor Reset
The LTC692/LTC693 use a bandgap voltage reference
and a precision voltage comparator C1 to monitor the
5V supply input on V
falls below the reset voltage threshold, the RESET output
is forced to active low state. The reset voltage threshold
accounts for a 10% variation on V
becomes active low when V
typical). On power-up, the RESET signal is held active low
for a minimum of 140ms after reset voltage threshold is
reached to allow the power supply and microprocessor to
stabilize. The reset active time is adjustable on the LTC693.
On power down, the RESET signal remains active low
even with V
microprocessor in stable shutdown condition. Figure 1
shows the timing diagram of the RESET signal.
The precision voltage comparator, C1, typically has 40mV
of hysteresis which ensures that glitches at the V
not activate the RESET output. Response time is typically
10μs. To help prevent mistriggering due to transient loads,
V
the leads trimmed as short as possible.
The LTC693 has two additional outputs: RESET and
LOW LINE. RESET is an active high output and is the
inverse of RESET. LOW LINE is the output of the preci-
sion voltage comparator, C1. When V
reset voltage threshold, LOW LINE goes low. LOW LINE
returns high as soon as V
age threshold.
CC
pin should be bypassed with a 0.1μF capacitor with
CC
as low as 1V. This capability helps hold the
LOW LINE
RESET
V
CC
CC
(see Block Diagram). When V
CC
CC
V2
rises above the reset volt-
falls below 4.50V (4.40V
CC
t
1
, so the RESET output
CC
falls below the
Figure 1. Reset Active Time
CC
pin do
V1
CC
V2
Battery Switchover
The battery switchover circuit compares V
input, and connects V
V
comparator, C2, connects V
pumped NMOS power switch, M1. When V
above V
switch, M2. C2 has typically 20mV of hysteresis to prevent
spurious switching when V
The response time of C2 is approximately 20μs.
During normal operation, the LTC692/LTC693 use a charge
pumped NMOS power switch to achieve low dropout and
low supply current. This power switch can deliver up to
50mA to V
of 5Ω. The V
tor of 0.1μF or greater to ensure stability. Use of a larger
bypass capacitor is advantageous for supplying current
to heavy transient loads.
When operating currents larger than 50mA are required
from V
ferential) is desired, the LTC693 should be used. This
product provides BATT ON output to drive the base of the
external PNP transistor (Figure 2). If higher currents are
needed with the LTC692, a high current Schottky diode can
be connected from the V
the extra current.
CC
rises to 70mV above V
V1 = RESET VOLTAGE THRESHOLD
V2 = RESET VOLTAGE THRESHOLD +
RESET THRESHOLD HYSTERESIS
t
1
= RESET ACTIVE TIME
OUT
t
BATT
1
, or a lower dropout (V
OUT
, C2 connects V
OUT
from V
pin should be bypassed with a capaci-
CC
OUT
CC
and has a typical on-resistance
LTC692/LTC693
CC
to whichever is higher. When
OUT
pin to the V
OUT
remains nearly equal to V
BATT
to V
, the battery switchover
to V
V1
CC
BATT
CC
692_3 • F01
– V
through a charge
OUT
through a PMOS
OUT
CC
CC
pin to supply
falls to 50mV
to the V
voltage dif-
BATT
BATT
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.