MAX16997AAUA+ Maxim Integrated Products, MAX16997AAUA+ Datasheet - Page 5

• Manufacturer Part Number: MAX16997AAUA+
• Description: IC TIMER WATCHDOG 8-UMAX
• Manufacturer: Maxim Integrated Products
• Type: Watchdog Circuitr

Specifications of MAX16997AAUA+

• Number Of Voltages Monitored: 1
• Output: Open Drain or Open Collector
• Reset: Active Low
• Reset Timeout: Adjustable/Selectable
• Voltage - Threshold: Adjustable/Selectable
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

MAX16997A
3, 7
—
—
—
1
2
4
5
6
8
PIN
MAX16998A/B/D
_______________________________________________________________________________________
—
—
1
4
5
6
8
2
3
7
High-Voltage Watchdog Timers with
RESETIN
ENABLE
RESET
NAME
GND
N.C.
SWT
WDI
SRT
EN
IN
Power-Supply Input. Bypass IN to GND with a 0.1µF capacitor.
High-Impedance Input to the Enable Comparator. Depending on the voltage level
at EN, the internal watchdog timer is turned on or off (see the EN Input section).
No Connection. Not internally connected.
Watchdog Timeout Adjustment Input. Connect a capacitor between SWT and GND
to set the basic watchdog timeout period. Connect SWT to ground to disable the
watchdog timer function. See the Selecting the Watchdog Timeout Capacitor
section.
Ground
Watchdog Input.
MAX16997A/MAX16998A (Timeout Watchdog): Two consecutive WDI falling
edges must occur at WDI within the watchdog timeout period or RESET asserts.
The watchdog timer clears when a falling edge occurs on WDI or whenever RESET
is asserted. ENABLE asserts if three consecutive watchdog timeout periods have
expired without a falling edge at WDI. WDI is a high-impedance input. Leaving
WDI unconnected will cause improper operation of the watchdog timer.
MAX16998B/D (Window Watchdog): WDI falling transitions within periods shorter
than the closed window width or longer than the basic watchdog timeout period
force RESET to assert low for the reset timeout period. The watchdog timer begins
to count after RESET is deasserted. The watchdog timer clears when a WDI falling
edge occurs or whenever RESET is asserted. ENABLE asserts if three consecutive
watchdog timeout periods have expired without a falling edge at WDI. WDI is a
high-impedance input. Leaving WDI unconnected will cause improper operation of
the watchdog timer.
Open-Drain Enable Output. ENABLE asserts when three consecutive WDI faults
occur. ENABLE remains low until three consecutive good WDI falling edges occur.
ENABLE does not assert if the voltage at RESETIN (EN) is below its threshold.
These devices are guaranteed to be in correct ENABLE output logic state when
V
Reset Input. High-impedance input to the reset comparator. When V
below 1.235V, RESET asserts. RESET remains asserted as long as V
and for the reset timeout period after RESETIN goes high. Connect V
center point of an external resistive divider to set the threshold for the externally
monitored voltage. Connect RESETIN to a defined voltage logic-level.
Reset Timeout Adjustment Input. Connect a capacitor between SRT and GND to
set the reset timeout period. See the Selecting the Reset Timeout Capacitor
section.
Open-Drain Reset Output. RESET asserts whenever RESETIN drops below the
selected reset threshold voltage (V
period after all reset conditions are removed, and then goes high. RESET asserts
for a period of t
resistor connected to a voltage higher than 2.5V (typ).
IN
remains greater than 1.1V.
Adjustable Timeout Delay
RESET
whenever a WDI fault occurs. Connect RESET to a pullup
PON
FUNCTION
). RESET remains low for the reset timeout
Pin Description
RESETIN
RESETIN
RESETIN
falls
is low
to the
5