LTC1726IS8-5 Linear Technology, LTC1726IS8-5 Datasheet - Page 6

IC MON TRPL SPPLY SUPERVSR 8SOIC

LTC1726IS8-5

Manufacturer Part Number
LTC1726IS8-5
Description
IC MON TRPL SPPLY SUPERVSR 8SOIC
Manufacturer
Linear Technology
Type
Multi-Voltage Supervisorr
Datasheet

Specifications of LTC1726IS8-5

Number Of Voltages Monitored
3
Output
Open Drain or Open Collector
Reset
Active Low
Reset Timeout
Adjustable/Selectable
Voltage - Threshold
3.085V, 4.675V, Adj
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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pin FuncTions
LTC1726
V
power to the part when the voltage on this pin is greater
than the voltage on V
with a 0.1µF or larger ceramic capacitor.
V
supplies power to the part when the voltage on this pin is
greater than the voltage on V
with a 0.1µF or larger ceramic capacitor.
V
also supplies power to the part when the voltage on this
pin is greater than the voltage on V
ground with a 0.1µF or larger ceramic capacitor.
V
it can be tied to either V
GND (Pin 4): Ground.
WDI (Pin 5): Watchdog Input. A logic input whose rising
or falling edge must occur on this pin within the selected
watchdog time-out period or a reset pulse will occur. The
watchdog time-out period is set by the value of the ca-
pacitor that is placed on the WT pin. The rising or falling
edge of this pin clears the voltage on the WT capacitor,
preventing a reset pulse from occurring. If the watchdog
timer is not cleared, a reset pulse will occur. The watchdog
timer is cleared during a reset and restarts when the reset
is deasserted. When disabling the watchdog function, this
6
CC3
CC5
CC25
CCA
(Pin 2): 5V Sense Input (LTC1726-5). This pin also
(Pin 3): 1V Sense, High Impedance Input. If unused
(Pin 1): 3.3V Sense Input. This pin also supplies
(Pin 2): 2.5V Sense Input (LTC1726-2.5). This pin
CC25
CC3
/V
CC5
, V
CC3
CC5
. Bypass this pin to ground
. Bypass this pin to ground
or V
CC3
. Bypass this pin to
CC25
.
pin should be connected to either V
must be grounded.
RST (Pin 6): Reset Logic Output. Active low, open-drain
logic output with weak pull-up to V
or more of the supplies are below trip thresholds. After all
supplies become valid, the reset remains asserted for the
period set by the capacitor on the RT pin. The watchdog
timer can also trigger the reset whenever the watchdog
time-out period is exceeded. This pin can be pulled up
greater than V
WT (Pin 7): Watchdog Time-Out Input. Place a capacitor
between this pin and ground to adjust the watchdog time-
out period. To determine the watchdog time-out period:
with t
pacitor will generate a 1s watchdog time-out period. The
watchdog function can be disabled by connecting this
pin to ground.
RT (Pin 8): Reset Time-Out Input. Place a capacitor between
this pin and ground to adjust the reset time-out period.
To determine the reset time-out period:
with t
tor will generate a 155ms reset time-out period.
t
t
WT
RT
RT
WT
= 3.30 • C
= 21.8 • C
in µs and C
in µs and C
CC3
RT
WT
when interfacing to 5V logic.
RT
WT
in pF . As an example, a 47nF capaci-
in pF . As an example, a 47nF ca-
CC3
CC3
. Asserted when one
or ground and WT
1726fc

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