CAT1027ZI-30-GT3 ON Semiconductor, CAT1027ZI-30-GT3 Datasheet - Page 10

• Manufacturer Part Number: CAT1027ZI-30-GT3
• Description: IC SUPERVISOR CPU 2K EEPR 8MSOP
• Manufacturer: ON Semiconductor
• Type: Multi-Voltage Supervisorr

Specifications of CAT1027ZI-30-GT3

• Number Of Voltages Monitored: 2
• Output: Open Drain or Open Collector
• Reset: Active Low
• Reset Timeout: 130 ms Minimum
• Voltage - Threshold: 3V, Adj
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
• Undervoltage Threshold: 3 V to 3.15 V
• Output Type: Open Collector / Drain
• Manual Reset: Resettable
• Watchdog: Watchdog
• Power-up Reset Delay (typ): 5 us
• Supply Voltage (max): + 7 V
• Supply Voltage (min): - 2 V
• Supply Current (typ): - 2 uA to + 10 uA
• Maximum Power Dissipation: 1 W
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Power Fail Detection: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

CAT1026, CAT1027
ACKNOWLEDGE
After a successful data transfer, each receiving
device is required to generate an acknowledge. The
acknowledging device pulls down the SDA line
during the ninth clock cycle, signaling that it received
the 8 bits of data.
The CAT1026 and CAT1027 respond with an
acknowledge after receiving a START condition and
its slave address. If the device has been selected
along with a write operation, it responds with an
acknowledge after receiving each 8-bit byte.
When the CAT1026 and CAT1027 begin a READ
mode it transmits 8 bits of data, releases the SDA
line and monitors the line for an acknowledge. Once
it receives this acknowledge, the CAT1026 and
CAT1027 will continue to transmit data. If no
acknowledge is sent by the Master, the device
terminates data transmission and waits for a STOP
condition.
Figure 5. Start/Stop Timing
Figure 6. Acknowledge Timing
Figure 7: Slave Address Bits
Doc. No. MD-3010 Rev. P
FROM TRANSMITTER
FROM RECEIVER
SDA
SCL
DATA OUTPUT
DATA OUTPUT
SCL FROM
Default Configuration
MASTER
START BIT
START
1
1
0
10
1
WRITE OPERATIONS
Byte Write
In the Byte Write mode, the Master device sends the
START condition and the slave address information
(with the R/W ¯ ¯ bit set to zero) to the Slave device. After
the Slave generates an acknowledge, the Master sends
a 8-bit address that is to be written into the address
pointers of the device. After receiving another acknow-
ledge from the Slave, the Master device transmits the
data to be written into the addressed memory location.
The CAT1026 and CAT1027 acknowledge once more
and the Master generates the STOP condition. At this
time, the device begins an internal programming cycle
to non-volatile memory. While the cycle is in progress,
the device will not respond to any request from the
Master device.
0
0
8
0
STOP BIT
ACKNOWLEDGE
0
R/W
9
Characteristics subject to change without notice
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