MAX6727KAVDD3+T Maxim Integrated Products, MAX6727KAVDD3+T Datasheet - Page 10

• Manufacturer Part Number: MAX6727KAVDD3+T
• Description: IC SUPERVISOR MPU SOT23-8
• Manufacturer: Maxim Integrated Products
• Type: Multi-Voltage Supervisorr

Specifications of MAX6727KAVDD3+T

• Number Of Voltages Monitored: 3
• Output: Open Drain or Open Collector
• Reset: Active Low
• Reset Timeout: 140 ms Minimum
• Voltage - Threshold: 0.788V, 1.575V, Adj
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: SOT-23-8
• Monitored Voltage: 1.8 V to 5 V, 0.9 V to 3.3 V
• Undervoltage Threshold: 1.53 V, 0.765 V, Adjustable
• Overvoltage Threshold: 1.62 V, 0.81 V, Adjustable
• Output Type: Active Low, Open Drain
• Manual Reset: Resettable
• Watchdog: Watchdog
• Battery Backup Switching: No Backup
• Power-up Reset Delay (typ): 210 ms
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 0.8 V
• Supply Current (typ): 15 uA
• Maximum Power Dissipation: 714 mW
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Power Fail Detection: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

restarts. The MAX6715/MAX6717/MAX6719/MAX6721/
MAX6723/MAX6725/MAX6727/MAX6728 contain open-
drain reset outputs, while the MAX6716/MAX6718/
MAX6720/MAX6722/MAX6724/MAX6726/MAX6729
contain push-pull reset outputs. The MAX6727 provides
two separate open-drain RST outputs driven by the
same internal logic.
Many microprocessor-based products require manual
reset capability, allowing the operator, a test techni-
cian, or external logic circuitry to initiate a reset. A logic
low on MR asserts the reset output. Reset remains
asserted while MR is low and for the reset timeout peri-
od (t
50kΩ pullup resistor to V
nected if not used. MR can be driven with TTL or
CMOS logic levels, or with open-drain/collector outputs.
Connect a normally open momentary switch from MR to
GND to create a manual reset function; external
debounce circuitry is not required. If MR is driven from
long cables or if the device is used in a noisy environ-
ment, connect a 0.1µF capacitor from MR to GND to
provide additional noise immunity.
The MAX6719/MAX6720 and MAX6723–MAX6727 provide
an additional input to monitor a third system voltage. The
threshold voltage at RSTIN is typically 626mV. Connect a
resistor-divider network to the circuit as shown in Figure 1
to establish an externally controlled threshold voltage,
V
Low leakage current at RSTIN allows the use of large-
valued resistors resulting in reduced power consump-
tion of the system.
The watchdog monitors µP activity through the watch-
dog input (WDI). To use the watchdog function, con-
nect WDI to a bus line or µP I/O line. When WDI
remains high or low for longer than the watchdog time-
out period, the reset output asserts.
The MAX6721–MAX6729 include a dual-mode watch-
dog timer to monitor µP activity. The flexible timeout
architecture provides a long period initial watchdog
mode, allowing complicated systems to complete
lengthy boots, and a short period normal watchdog
mode, allowing the supervisor to provide quick alerts
Dual/Triple Ultra-Low-Voltage SOT23 µP
Supervisory Circuits
10
EXT_TH
RP
______________________________________________________________________________________
) after MR returns high. This input has an internal
.
V
EXT_TH
= 626mV((R1 + R2)/R2)
Adjustable Input Voltage
CC
1 and can be left uncon-
Manual Reset Input
Watchdog Input
when processor activity fails. After each reset event
(V
reset), there is a long initial watchdog period of 35s
minimum. The long watchdog period mode provides an
extended time for the system to power-up and fully ini-
tialize all µP and system components before assuming
responsibility for routine watchdog updates.
The normal watchdog timeout period (1.12s min)
begins after the first transition on WDI before the con-
clusion of the long initial watchdog period (Figure 2).
During the normal operating mode, the supervisor will
issue a reset pulse for the reset timeout period if the µP
does not update the WDI with a valid transition (high-to-
low or low-to-high) within the standard timeout period
(1.12s min).
PFI is the noninverting input to a comparator. If PFI is
less than V
for the power-fail comparator include monitoring prereg-
ulated input of the power supply (such as a battery) or
Figure 1. Monitoring a Third Voltage
Figure 2. Normal Watchdog Startup Sequence
CC
WDI
V
V
RESET
EXT_TH
CC
power-up/brownout, manual reset, or watchdog
PFI
(626.5mV), PFO goes low. Common uses
V
R1
R2
TH
t
WDI-NORMAL
t
1.12s MAX
RP
t
WDI-STARTUP
RSTIN
35s MAX
Power-Fail Comparator
MAX6723–
MAX6719/
MAX6720/
1.12s MAX
MAX6727
GND