DS1238S-10 Maxim Integrated Products, DS1238S-10 Datasheet - Page 7

• Manufacturer Part Number: DS1238S-10
• Description: IC MICROMAN W/FRESH 10% 16-SOIC
• Manufacturer: Maxim Integrated Products
• Series: MicroManagerr
• Type: Battery Backup Circuitr

Specifications of DS1238S-10

• Number Of Voltages Monitored: 1
• Output: Open Drain, Push-Pull
• Reset: Active High/Active Low
• Reset Timeout: 40 ms Minimum
• Voltage - Threshold: 4.37V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

MEMORY BACKUP
The DS1238 provides all of the necessary functions required to battery back a static RAM. First, an
internal switch is provided to supply SRAM power from the primary 5-volt supply (V
external battery (V
power monitor section is used to hold the chip enable output (
0.7 volts of V
the battery in violation of UL standards. Write protection occurs as V
high, or the period t
prevents the corruption of data. If
be unconditionally disabled within t
maximum propagation delay of 20 ns. Figure 7 shows a typical nonvolatile SRAM application.
FRESHNESS SEAL
In order to conserve battery capacity during storage and/or shipment of an end system, the DS1238
provides an internal freshness seal to electrically disconnect the battery. Figure 8 depicts the three pulses
below ground on the IN pin required to invoke the freshness seal. The freshness seal will result in the tri-
state of outputs V
disabled by the freshness mode and will continue to source power from the V
below V
and reapplied to a level above V
To prevent negative pulses associated with noise from setting the freshness mode in system applications,
a series diode and resistor can be used to shunt noise to ground. During manufacturing, the freshness seal
can still be set by holding TP2 at -3 volts while applying the 0 to -3-volt clock to TP1.
POWER SWITCHING
When larger operating currents are required in a battery-backed system, the internal switching devices of
the DS1238 may be too small to support the required load through V
For these applications, the PF output is provided to gate external power switching devices. As shown in
Figure 9, power to the load is switched from V
power-p. The DS1336 is designed to use the PF output to switch between V
better leakage and switchover performance than currently available discrete components. The transition
threshold for PF is set to the external battery voltage V
Any load applied to the PF pin by an external switch will be supplied by the battery. Therefore, if a
discrete switch is used, this load should be taken into consideration when sizing the battery.
CEI
is low at the time power-fail detection occurs,
BAT
. The freshness seal will be disconnected and normal operation will begin when V
BAT
. The output voltage diode drop from V
CCO
BAT
CE
, RST,
expires. This delay of write protection until the current memory cycle is completed
), whichever is greater. Second, the same power-fail detection described in the
RST
BAT
, and
CEO
.
CF
CEO
. During nominal supply conditions
is in an inactive state at the time of V
. The
CC
7 of 14
WDS
to battery on power-down, and from battery to V
CEO
BAT
output will be driven active low. The PF pin is not
BAT
is held in its present state until
, allowing a smooth transition between sources.
CEO
(0.7 V) is necessary to prevent charging of
) to within 0.3 volts of V
CC
CCO
falls below V
with a reasonable voltage drop.
CEO
CC
BAT
BAT
fail detection,
will follow
pin whenever V
and V
CCTP
CC
CEI
CC
as specified. If
CC
) or from an
. It provides
or to within
CC
CEI
is returned
CEO
is cycled
DS1238
with a
CC
CC
will
on
is