DS1238A-5 Maxim Integrated Products, DS1238A-5 Datasheet - Page 4
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DS1238A-5
Manufacturer Part Number
DS1238A-5
Description
IC MICROMANAGER 5% 16-DIP
Manufacturer
Maxim Integrated Products
Series
MicroManagerr
Type
Battery Backup Circuitr
Specifications of DS1238A-5
Number Of Voltages Monitored
1
Output
Open Drain or Open Collector
Reset
Active High/Active Low
Reset Timeout
40 ms Minimum
Voltage - Threshold
4.62V
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
16-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
full period as outlined in NO TAG. The
The first is to strobe the
timer count. The second is to leave the
active low whenever V
from microprocessor address, data, or control signals, as well as microcontroller port pins. Under normal
operating conditions, these signals would routinely reset the watchdog timer prior to timeout. The
watchdog is disabled by leaving the
NON-MASKABLE INTERRUPT
The DS1238A generates a non-maskable interrupt (
microprocessor. A precision comparator monitors the voltage level at the IN pin relative to an on-chip
reference generated by an internal band gap. The IN pin is a high-impedance input allowing for a user-
defined sense point. An external resistor voltage divider network (NO TAG) is used to interface with high
voltage signals. This sense point may be derived from the regulated 5-volt supply, or from a higher DC
voltage level closer to the main system power input. Since the IN trip point V
values for R1 and R2 can be determined by the equation as shown in NO TAG. Proper operation of the
DS1238A requires that the voltage at the IN pin be limited to V
voltage at the supply being monitored (V
approach to solving this equation is to select a value for R2 of high enough value to keep power
consumption low, and solve for R1. The flexibility of the IN input pin allows for detection of power loss
at the earliest point in a power supply system, maximizing the amount of time for microprocessor
shutdown between
When the supply being monitored decays to the voltage sense point, the DS1238A will force the
output to an active state. Noise is removed from the
time domain hysteresis. That is, the monitored supply is sampled periodically at a rate determined by an
internal ring oscillator running at approximately 30 kHz (33 s/cycle). Three consecutive samplings of
out-of-tolerance supply (below V
must be below the voltage sense point for approximately 100 s or the comparator will reset. In this way,
power supply noise is removed from the monitoring function preventing false trips. During a power-up,
any IN pin levels below V
V
Removal of an active low level on the
V
relationship between V
active. The
ST INPUT TIMING Figure 2
NMI
NMI
CC
TP
. The initiation and removal of the
rises to V
to be virtually nonexistent on power-up. This is of no consequence, however, since an RST will be
pin will enter a tri-state mode.
NMI
CCTP
voltage will follow V
. As a result, any potential active
NMI
CC
CC
and RST or
ST
falls below V
and the IN pin voltage. Note that a fast-slewing power supply may cause the
TP
pin with a falling edge, which will both set the
detected by the comparator are disabled from reaching the
SENSE
ST
RST
CC
) must occur at the IN pin to active
ST
input open, or as soon as V
NMI
CCTP
.
down until V
NMI
WDS
pin open, which disables the watchdog. Lastly, the
MAX
and activates the
pin is controlled by the subsequent rise of the IN pin above
) can also be derived as shown in NO TAG. A simple
signal during power up depends on the relative voltage
pin will remain low until one of three operations occurs.
4 of 13
NMI
NMI
CC
NMI
will not be initiated until V
decays to V
) for early warning of a power failure to the
power-fail detection circuitry using built-in
RVT
IH
CC
. Therefore, the maximum allowable
signal. The
BAT
falls to V
. Once V
WDS
NMI
TP
CCTP
ST
is 1.27 volts, the proper
CC
as well as the watchdog
. Therefore, the supply
.
CC
decays to V
input can be derived
reaches V
NMI
WDS
BAT
CCTP
pin until
DS1238A
pin is
.
NMI
, the