MCP1804T-5002I/DB Microchip Technology, MCP1804T-5002I/DB Datasheet - Page 17
![IC REG LDO 5V 150MA SOT223-3](/photos/12/58/125852/mfg_mcp1825_sot223-3_sml.jpg)
MCP1804T-5002I/DB
Manufacturer Part Number
MCP1804T-5002I/DB
Description
IC REG LDO 5V 150MA SOT223-3
Manufacturer
Microchip Technology
Datasheet
1.MCP1804T-C002IOT.pdf
(38 pages)
Specifications of MCP1804T-5002I/DB
Package / Case
SOT-223 (3 leads + Tab), SC-73, TO-261
Regulator Topology
Positive Fixed
Voltage - Output
5V
Voltage - Input
Up to 28V
Voltage - Dropout (typical)
1V @ 100mA
Number Of Regulators
1
Current - Output
150mA (Min)
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Input Voltage Max
28 V
Output Voltage
1.8 V
Output Voltage Tolerance
+/- 2 %
Dropout Voltage (max)
710 V
Output Current
150 mA
Line Regulation
0.05 %/V
Load Regulation
275 mV
Maximum Power Dissipation
300 mW
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Limit (min)
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
MCP1804T-5002I/DBTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCP1804T-5002I/DB
Manufacturer:
ON
Quantity:
42 000
3.0
The descriptions of the pins are listed in
TABLE 3-1:
3.1
Connect V
Like all low dropout linear regulators, low source
impedance is necessary for the stable operation of the
LDO. The amount of capacitance required to ensure
low source impedance will depend on the proximity of
the input source capacitors or battery type. For most
applications,
ensure stable operation of the LDO circuit. The type of
capacitor used can be ceramic, tantalum or aluminum
electrolytic. The low ESR characteristics of the ceramic
will yield better noise and PSRR performance at
high-frequency.
3.2
Regulator ground. Tie GND to the negative side of the
output and the negative side of the input capacitor.
Only the LDO bias current (50 to 60 µA typical) flows
out of this pin; there is no high current. The LDO output
regulation is referenced to this pin. Minimize voltage
drops between this pin and the negative side of the
load.
© 2009 Microchip Technology Inc.
SOT-23-5
1
2
3
4
5
PIN DESCRIPTIONS
Unregulated Input Voltage (V
Ground Terminal (GND)
IN
to the input unregulated source voltage.
0.1 µF to 1.0 µF of capacitance will
MCP1804 PIN FUNCTION TABLE
SOT-89-5
MCP1804
2,TAB
5
4
3
1
SOT-223-3,
Table
SOT-89-3
2, TAB
—
—
3
1
3-1.
IN
)
Symbol
SHDN
3.3
The SHDN input is used to turn the LDO output voltage
on and off. When the SHDN input is at a logic-high
level, the LDO output voltage is enabled. When the
SHDN input is pulled to a logic-low level, the LDO
output voltage is disabled and the LDO enters a low
quiescent current shutdown state where the typical
quiescent current is 0.01 µA. The SHDN pin does not
have an internal pullup or pulldown resistor. The SHDN
pin must be connected to either V
the device from becoming unstable.
3.4
Connect V
positive terminal of the output capacitor. The positive
side of the output capacitor should be physically
located as close to the LDO V
The current flowing out of this pin is equal to the DC
load current. For most applications, 0.1 µF to 1.0 µF of
capacitance will ensure stable operation of the LDO
circuit. Larger values may be used to improve dynamic
load response. The type of capacitor used can be
ceramic, tantalum or aluminum electrolytic. The low
ESR characteristics of the ceramic will yield better
noise and PSRR performance at high-frequency.
V
GND
V
NC
OUT
IN
Shutdown Input (SHDN)
Regulated Output Voltage (V
OUT
Unregulated Supply Voltage
Ground Terminal
No connection
Shutdown
Regulated Voltage Output
to the positive side of the load and the
Description
MCP1804
OUT
IN
pin as is practical.
or GND to prevent
DS22200B-page 17
OUT
)