LP3875EMP-ADJ/NOPB National Semiconductor, LP3875EMP-ADJ/NOPB Datasheet - Page 11
![IC REG LDO 1.5A ADJ SOT223-5](/photos/12/65/126584/pkg_mp05a_sml.jpg)
LP3875EMP-ADJ/NOPB
Manufacturer Part Number
LP3875EMP-ADJ/NOPB
Description
IC REG LDO 1.5A ADJ SOT223-5
Manufacturer
National Semiconductor
Datasheet
1.LP3875EMP-ADJNOPB.pdf
(15 pages)
Specifications of LP3875EMP-ADJ/NOPB
Regulator Topology
Positive Adjustable
Voltage - Output
Adjustable
Voltage - Input
2.5 ~ 7 V
Voltage - Dropout (typical)
0.38V @ 1.5A
Number Of Regulators
1
Current - Output
1.5A (Max)
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
SOT-223 (4 leads + Tab)
Number Of Outputs
1
Polarity
Positive
Input Voltage Max
7 V
Output Voltage
1.216 V
Output Type
Adjustable
Dropout Voltage (max)
0.05 V at 150 mA
Output Current
1.5 A
Line Regulation
0.02 %
Load Regulation
0.06 %
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Reference Voltage
1.216 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Limit (min)
-
Lead Free Status / Rohs Status
Details
Other names
LP3875EMP-ADJ
LP3875EMP-ADJTR
LP3875EMP-ADJTR
Application Hints
the current drawn by the internal reference increases the
total supply current (ground pin current). Using an optimized
trade-off of ground pin current and die size, LP3875-ADJ
achieves low noise performance and low quiescent current
operation.
The total output noise specification for LP3875-ADJ is pre-
sented in the Electrical Characteristics table. The Output
noise density at different frequencies is represented by a
curve under typical performance characteristics.
SHORT-CIRCUIT PROTECTION
The LP3875-ADJ is short circuit protected and in the event of
a peak over-current condition, the short-circuit control loop
will rapidly drive the output PMOS pass element off. Once
the power pass element shuts down, the control loop will
rapidly cycle the output on and off until the average power
dissipation causes the thermal shutdown circuit to respond
to servo the on/off cycling to a lower frequency. Please refer
to the section on thermal information for power dissipation
calculations.
SHUTDOWN OPERATION
A CMOS Logic level signal at the shutdown ( SD) pin will
turn-off the regulator. Pin SD must be actively terminated
through a 10kΩ pull-up resistor for a proper operation. If this
pin is driven from a source that actively pulls high and low
(such as a CMOS rail to rail comparator), the pull-up resistor
is not required. This pin must be tied to Vin if not used.
DROPOUT VOLTAGE
The dropout voltage of a regulator is defined as the minimum
input-to-output differential required to stay within 2% of the
nominal output voltage. For CMOS LDOs, the dropout volt-
age is the product of the load current and the Rds(on) of the
internal MOSFET.
REVERSE CURRENT PATH
The internal MOSFET in the LP3875-ADJ has an inherent
parasitic diode. During normal operation, the input voltage is
higher than the output voltage and the parasitic diode is
reverse biased. However, if the output is pulled above the
input in an application, then current flows from the output to
the input as the parasitic diode gets forward biased. The
output can be pulled above the input as long as the current
in the parasitic diode is limited to 200mA continuous and 1A
peak.
POWER DISSIPATION/HEATSINKING
The LP3875-ADJ can deliver a continuous current of 1.5A
over the full operating temperature range. A heatsink may be
required depending on the maximum power dissipation and
maximum ambient temperature of the application. Under all
possible conditions, the junction temperature must be within
the range specified under operating conditions. The total
power dissipation of the device is given by:
P
where I
(specified under Electrical Characteristics).
The maximum allowable temperature rise (T
on the maximum ambient temperature (T
cation, and the maximum allowable junction temperature
(T
T
Rmax
D
Jmax
= (V
):
= T
IN
GND
−V
Jmax
OUT
is the operating ground current of the device
− T
)I
OUT
Amax
+ (V
IN
)I
GND
(Continued)
Amax
Rmax
) of the appli-
) depends
11
The maximum allowable value for junction to ambient Ther-
mal Resistance, θ
θ
The LP3875-ADJ is available in TO-220 and TO-263 pack-
ages. The thermal resistance depends on amount of copper
area or heat sink, and on air flow. If the maximum allowable
value of θ
package and ≥ 60 ˚C/W for TO-263 package no heatsink is
needed since the package can dissipate enough heat to
satisfy these requirements. If the value for allowable θ
below these limits, a heat sink is required.
HEATSINKING TO-220 PACKAGE
The thermal resistance of a TO220 package can be reduced
by attaching it to a heat sink or a copper plane on a PC
board. If a copper plane is to be used, the values of θ
be same as shown in next section for TO263 package.
The heatsink to be used in the application should have a
heatsink to ambient thermal resistance,
θ
In this equation, θ
to the surface of the heat sink and θ
tance from the junction to the surface of the case. θ
about 3˚C/W for a TO220 package. The value for θ
pends on method of attachment, insulator, etc. θ
between 1.5˚C/W to 2.5˚C/W. If the exact value is unknown,
2˚C/W can be assumed.
HEATSINKING TO-263 PACKAGE
The TO-263 package uses the copper plane on the PCB as
a heatsink. The tab of these packages are soldered to the
copper plane for heat sinking. Figure 1 shows a curve for the
θ
a typical PCB with 1 ounce copper and no solder mask over
the copper area for heat sinking.
As shown in the figure, increasing the copper area beyond 1
square inch produces very little improvement. The minimum
value for θ
32˚C/W.
Figure 2 shows the maximum allowable power dissipation
for TO-263 packages for different ambient temperatures,
assuming θ
ture is 125˚C.
JA
HA
JA
FIGURE 1. θ
≤ θ
of TO-263 package for different copper area sizes, using
= T
JA
Rmax
− θ
JA
JA
JA
/ P
CH
for the TO-263 package mounted to a PCB is
is 35˚C/W and the maximum junction tempera-
calculated above is ≥ 60 ˚C/W for TO-220
JA
D
− θ
CH
vs Copper (1 Ounce) Area for TO-263
JA
JC
, can be calculated using the formula:
is the thermal resistance from the case
.
package
JC
is the thermal resis-
20074632
www.national.com
CH
CH
JA
varies
JA
JC
falls
will
de-
is