LP38512TJ-ADJ/NOPB National Semiconductor, LP38512TJ-ADJ/NOPB Datasheet - Page 10

• Manufacturer Part Number: LP38512TJ-ADJ/NOPB
• Description: IC REG LDO 1.5A ADJ TO263-5
• Manufacturer: National Semiconductor

Specifications of LP38512TJ-ADJ/NOPB

• Regulator Topology: Positive Adjustable
• Voltage - Output: 0.5 ~ 4.5 V
• Voltage - Input: 2.25 ~ 5.5 V
• Number Of Regulators: 1
• Current - Output: 1.5A (Max)
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: TO-263-5 Thin
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Dropout (typical): -
• Current - Limit (min): -
• Other names: LP38512TJ-ADJTR

www.national.com
The maximum allowable junction temperature rise (ΔT
pends on the maximum expected ambient temperature (T
(MAX)
temperature (T
The maximum allowable value for junction to ambient Ther-
mal Resistance, θ
LP38512-ADJ is available in TO-263 THIN and PSOP-8 sur-
face mount packages. For a comparison of the TO-263 THIN
package to the standard TO-263 package see Application
Note AN-1797 TO-263 THIN Package. The θ
sistance depends on amount of copper area, or heat sink,
attached to the DAP, and on air flow. See Application Note
AN-1520 A Guide to Board Layout for Best Thermal Resis-
tance for Exposed Packages for guidelines.
Heat-Sinking the TO-263 THIN Package
The DAP of the TO-263 THIN package is soldered to the cop-
per plane for heat sinking. The TO-263 THIN package has a
θ
of 67°C/W includes the device DAP soldered to an area of
0.055 square inches (0.22 in x 0.25 in) of 1 ounce copper on
a two sided PCB, with no airflow. See JEDEC standard EIA/
JESD51-3 for more information.
Figure 1 shows a curve for the θ
for different thermal via counts under the exposed DAP, using
a four layer PCB for heat sinking. The thermal vias connect
the copper area directly under the exposed DAP to the first
internal copper plane only. See JEDEC standards EIA/
JESD51-5 and EIA/JESD51-7 for more information.
FIGURE 1. θ
Figure 2 shows the thermal performance when the Thin
TO-263 is mounted to a two layer PCB where the copper area
is predominately directly under the exposed DAP.As shown
in the figure, increasing the copper area beyond 1 square inch
produces very little improvement.
JA
rating of 67°C/W, and a θ
) of the application, and the maximum allowable junction
JA
J(MAX)
vs Thermal Via Count for the TO-263 THIN
ΔT
Package on 4–Layer PCB
θ
JA
J
JA
, can be calculated using the formula:
= T
):
= ΔT
J(MAX)
J
/ P
JC
− T
D(MAX)
rating of 2°C/W. The θ
JA
A(MAX)
of TO-263 THIN package
30040935
JA
thermal re-
JA
rating
J
) de-
(8)
(9)
A
10
Heat-Sinking The PSOP-8 Package
The DAP of the PSOP-8 package is soldered to the copper
plane for heat sinking. The LP38512MR package has a θ
rating of 168°C/W, and a θ
of 168°C/W includes the device DAP soldered to an area of
0.008 square inches (0.09 in x 0.09 in) of 1 ounce copper on
a two sided PCB, with no airflow. See JEDEC standard EIA/
JESD51-3 for more information.
Figure 3 shows a curve for different thermal via counts under
the exposed DAP, using a four layer PCB for heat sinking.
The thermal vias connect the copper area directly under the
exposed DAP to the first internal copper plane only. See
JEDEC standards EIA/JESD51-5 and EIA/JESD51-7 for
more information.
Figure 4 shows thermal performance for a two layer board
using thermal vias to a copper area on the bottom of the PCB.
The copper area on the top of the PCB, which is soldered to
the exposed DAP, is 0.10in x 0.20in, which is approximately
the same dimensions as the body of the PSOP-8 package.
The copper area on the bottom of the PCB is a square area
and is centered directly under the PSOP-8 package.
Package on 2–Layer PCB with Copper Area on Bottom-
FIGURE 3. θ
FIGURE 2. θ
JA
JA
vs Thermal Via Count for the PSOP-8
vs Copper Area for the TO-263 THIN
Package
JC
Side
rating of 11°C/W. The θ
30040936
30040937
JA
rating
JA