AP7217A-33SPG-13 Diodes Inc, AP7217A-33SPG-13 Datasheet - Page 8

IC REG LDO 600MA 3.3V 8-SOIC

AP7217A-33SPG-13

Manufacturer Part Number
AP7217A-33SPG-13
Description
IC REG LDO 600MA 3.3V 8-SOIC
Manufacturer
Diodes Inc
Datasheet

Specifications of AP7217A-33SPG-13

Regulator Topology
Positive Fixed
Voltage - Output
3.3V
Voltage - Input
Up to 5.5V
Voltage - Dropout (typical)
0.8V @ 600mA
Number Of Regulators
1
Current - Output
600mA (Max)
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width) Exposed Pad, 8-eSOIC. 8-HSOIC
Number Of Outputs
1
Polarity
Positive
Input Voltage Max
5.5 V
Output Voltage
3.3 V
Output Type
Fixed
Dropout Voltage (max)
0.4 V at 300 mA
Output Current
0.6 A
Line Regulation
0.2 %/V
Load Regulation
50 mV
Maximum Power Dissipation
1650 mW
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Limit (min)
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Application Note
Current Limit Protection
When output current at OUT pin is higher than current limit
threshold, the current limit protection will be triggered and clamp
the output current to approximately 750mA to prevent
over-current and to protect the regulator from damage due to
overheating.
Marking Information
(1) SOP-8L
(2) SOP-8L-EP
AP7217A Rev. 3
DS31423
Vin
Iin
C
IN
Part Number
AP7217A
Part No.
GND
Logo
Iq
Logo
OUT
(Continued)
Iout
ESR
Co
www.diodes.com
Vout
( Top View )
YY WW X X
7217A-33
( Top View )
YY WW X X
7217A-33
8
1
8
1
8 of 10
Short circuit protection
When VR
200mV, short circuit protection will be triggered and clamp the
output current to approximately 50mA.
VD
---Open-Drain Active-Low reset output---
In general, VD
The AP7217A microprocess (uP) supervisory circuitry asserts a
guaranteed logic-low reset during power-up and power-down.
Reset is asserted asserts when V
and remain asserted for at least t
threshold.
As long as V
logic "0". When V
asserted after a time delay defined by t
5
4
5
4
OUT
E
(reset output)
OUT
G : Green
YY : Year : 08, 09,10~
WW : Week : 01~52; 52
X : Internal Code
IN
pin is shorted to GND or VR
is lower than the reset threshold, VD
OUT
G : Green
YY : Year : 08, 09,10~
SOP-8L-EP
WW : Week : 01~52; 52
X : Internal Code
represents 52 and 53 week
is pulled up by a resistor (100Kohm) to V
IN
represents 52 and 53 week
become higher than V
3.3V 600mA CMOS LDO
RP
IN
after V
is below the reset threshold
RP
AP7217A
.
OUT
©
IN
OCTOBER 2009
rises above the reset
Diodes Incorporated
voltage is less than
TH
, a logic "1" is
OUT
remains at
IN
.

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