MCP1727-3302E/SN Microchip Technology, MCP1727-3302E/SN Datasheet - Page 20

• Manufacturer Part Number: MCP1727-3302E/SN
• Description: IC REG LDO 1.5A 3.3V 8SOIC
• Manufacturer: Microchip Technology

Specifications of MCP1727-3302E/SN

• Package / Case: 8-SOIC (3.9mm Width)
• Regulator Topology: Positive Fixed
• Voltage - Output: 3.3V
• Voltage - Input: Up to 6V
• Voltage - Dropout (typical): 0.33V @ 1.5A
• Number Of Regulators: 1
• Current - Output: 1.5A (Min)
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Number Of Outputs: 1
• Polarity: Positive
• Input Voltage Max: 6 V
• Output Voltage: 3.3 V
• Output Type: Fixed
• Dropout Voltage (max): 0.55 V at 1.5 A
• Output Current: 1.5 A
• Line Regulation: 0.05 % / V
• Load Regulation: 0.5 %
• Voltage Regulation Accuracy: 2 %
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Primary Input Voltage: 3.85V
• Output Voltage Fixed: 3.3V
• Dropout Voltage Vdo: 330mV
• No. Of Pins: 8
• Voltage Regulator Case Style: SOIC
• Operating Temperature Range: -40°C To
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Limit (min): -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

MCP1726
Junction Temperature Estimate
To estimate the internal junction temperature, the
calculated temperature rise is added to the ambient or
offset temperature. For this example, the worst-case
junction temperature is estimated below:
As you can see from the result, this application will be
operating very near the maximum operating junction
temperature of 125°C. The PCB layout for this
application is very important as it has a significant
impact on the junction-to-ambient thermal resistance
(Rθ
in this application.
Maximum Package Power Dissipation at
70°C Ambient Temperature
From this table you can see the difference in maximum
allowable power dissipation between the 3x3 DFN
package and the 8-pin SOIC package. This difference
is due to the exposed metal tab on the bottom of the
DFN package. The exposed tab of the DFN package
provides a very good thermal path from the die of the
LDO to the PCB. The PCB then acts like a heatsink,
providing more area to distribute the heat generated by
the LDO.
DS21936C-page 20
3x3 DFN (41° C/W Rθ
8LD SOIC (150°C/Watt Rθ
JA
P
P
P
P
) of the 3x3 DFN package, which is very important
D(MAX)
D(MAX)
D(MAX)
D(MAX)
T
T
T
= (125°C – 70°C) / 41° C/W
= 1.34W
= (125°C – 70°C)/ 150° C/W
= 0.366W
J
J
J
=
=
=
JA
)
T
48.8°C + 70.0°C
118.8°C
JRISE
JA
)
+ T
A(MAX)
© 2007 Microchip Technology Inc.