MIC2214-SGBML TR Micrel Inc, MIC2214-SGBML TR Datasheet - Page 9

• Manufacturer Part Number: MIC2214-SGBML TR
• Description: IC REG LDO DUAL OPEN DRAIN 10MLF
• Manufacturer: Micrel Inc

Specifications of MIC2214-SGBML TR

• Regulator Topology: Positive Fixed
• Voltage - Output: 3.3V, 1.8V
• Voltage - Input: 2.25 ~ 5.5 V
• Voltage - Dropout (typical): 0.12V @ 150mA, 0.24V @ 300mA
• Number Of Regulators: 2
• Current - Output: 150mA, 300mA
• Current - Limit (min): 150mA, 300mA
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 10-MLF®, QFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: MIC2214-SGBMLTR; MIC2214-SGBMLTR

Functional Diagram
Functional Description
The MIC2214 is a high performance, low quiescent current
power management IC consisting of two µCap low dropout
regulators, a power-on reset (POR) circuit and an open-drain
driver. The first regulator is capable of sourcing 150mA at out-
put voltages from 1.25V to 5V. The second regulator is capable
of sourcing 300mA of current at output voltages from 1.25V
to 5V. The second regulator has a POR circuit that monitors
its output voltage and indicates when the output voltage is
within 5% of nominal. The POR offers a delay time that is
externally programmable with a single capacitor to ground. An
open-drain driver completes the power management chipset,
offering the capability of driving LEDs for keypad backlighting
in applications such as cellphones.
Enable
The enable input allows for logic control of both output volt-
ages with one enable input. The enable input is active high,
requiring 1.8V for guaranteed operation. The enable input is
CMOS logic and cannot by left floating.
October 2005
CBYP
CBYP
VIN1
VIN2
SET
EN1
EN2
SET
VIN
SW
SW
EN
Reference
Reference
Quickstart
MIC2214 Adjustable Voltage Block Diagram
MIC2214 Fixed Voltage Block Diagram
LDO1
LDO1
GND
GND
SW Logic
9
SW Logic
Power-On Reset (POR)
The power-on reset output is an open-drain N-Channel de-
vice, requiring a pull-up resistor to either the input voltage
or output voltage for proper voltage levels. The POR output
has a delay time that is programmable with a capacitor from
the SET pin to ground. The delay time can be programmed
to be as long as 1 second.
The SET pin is a current source output that charges a ca-
pacitor that sets the delay time for the power-on reset output.
The current source is a 1µA current source that charges a
capacitor up from 0V. When the capacitor reaches 1.25V, the
output of the POR is allowed to go high.
Open-Drain Driver (DRV)
The drive (DRV) pin is an open-drain output capable of sinking
150mA of current. This output is controlled by a logic level
input, the switch (SW) pin. The switch pin is an active high
input and cannot be left floating.
LDO2
LDO2
POR & Delay
POR & Delay
NGND
NGND
OUT1
OUT2
POR
DRV
OUT1
ADJ1
OUT2
ADJ2
POR
DRV
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