TC55RP3002ECB713 Microchip Technology, TC55RP3002ECB713 Datasheet - Page 10

IC REG LDO 3.0V 150MA SOT23A

TC55RP3002ECB713

Manufacturer Part Number
TC55RP3002ECB713
Description
IC REG LDO 3.0V 150MA SOT23A
Manufacturer
Microchip Technology
Datasheet

Specifications of TC55RP3002ECB713

Regulator Topology
Positive Fixed
Voltage - Output
3V
Voltage - Input
Up to 10V
Number Of Regulators
1
Current - Output
150mA (Min)
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
SOT-23A-3
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Voltage - Dropout (typical)
-
Current - Limit (min)
-
Other names
158-2043-2
158-2043-2
TC55RP3002ECB71TR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TC55RP3002ECB713
Manufacturer:
MICROCHI
Quantity:
20 000
TC55
5.0
5.1
The amount of power dissipated internal to the low
dropout linear regulator is the sum of the power dissi-
pation within the linear pass device (P-Channel MOS-
FET) and the quiescent current required to bias the
internal reference and error amplifier. The internal lin-
ear pass device power dissipation is calculated by mul-
tiplying the voltage across the linear device by the
current through the device.
EQUATION
The internal power dissipation, as a result of the bias
current for the LDO internal reference and error
amplifier, is calculated by multiplying the ground or
quiescent current by the input voltage.
EQUATION
The total internal power dissipation is the sum of P
(Pass Device) and P
EQUATION
For the TC55, the internal quiescent bias current is so
low (1 µA typical) that the P
dissipation equation can be ignored. The maximum
power dissipation can be estimated by using the
maximum input voltage and the minimum output
voltage to obtain a maximum voltage differential
between input and output. The next step would be to
multiply the maximum voltage differential by the
maximum output current.
DS21435F-page 10
P
TOTAL
THERMAL CONSIDERATIONS
Power Dissipation
P
D
(Pass Device) = (V
= P
P
D
D
(Pass Device) + P
(Bias) = V
D
(Bias).
D
IN
IN
(Bias) term of the power
x I
– V
GND
OUT
D
(Bias)
) x I
OUT
D
EQUATION
Given:
To determine the junction temperature of the device, the
thermal resistance from junction-to-ambient must be
known. The 3-pin SOT-23 thermal resistance from junc-
tion-to-air (R
359°C/W. The SOT-89 R
mately 110°C/W when mounted on 1 square inch of
copper. The TO-92 R
The R
application-specific conditions.
The device junction temperature is determined by
calculating the junction temperature rise above
ambient, then adding the rise to the ambient
temperature.
EQUATION
V
V
I
T
P
P
OUT
AMAX
IN
OUT
MAX
MAX
JA
Junction Temperature
SOT-23 Example:
T
T
T
SOT-89 Example:
T
T
TO-92 Example:
T
T
J
J
J
J
J
J
J
will vary with physical layout, airflow and other
= P
= 116.0 milliwatts x 359°C/W + 55°C
= 96.6°C
= 116.0 milliwatts x 110°C/W + 55°C
= 67.8°C
= 116.0 milliwatts x 131.9°C/W + 55°C
= 70.3°C
P
= 3.3V to 4.1V
= 3.0 V ± 2%
= 1 mA to 100 mA
= 55°C
= (4.1V – (3.0V x 0.98)) x 100 mA
= 116.0 milliwatts
D
= (V
DMAX
JA
) is estimated to be approximately
INMAX
x R
JA
– V
JA
© 2005 Microchip Technology Inc.
is estimated to be 131.9°C/W.
JA
+ T
OUTMIN
is estimated to be approxi-
A
) x I
OUTMAX

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