ADP120-AUJZ33R7 Analog Devices Inc, ADP120-AUJZ33R7 Datasheet - Page 17

IC REG LDO 100MA 3.3V SOT23-5

ADP120-AUJZ33R7

Manufacturer Part Number
ADP120-AUJZ33R7
Description
IC REG LDO 100MA 3.3V SOT23-5
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADP120-AUJZ33R7

Regulator Topology
Positive Fixed
Voltage - Output
3.3V
Voltage - Input
Up to 5.5V
Voltage - Dropout (typical)
0.08V @ 100mA
Number Of Regulators
1
Current - Output
100mA
Current - Limit (min)
110mA
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
TSOT-23-5, TSOT-5, TSOP-5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADP120-AUJZ33R7
Manufacturer:
ADI/亚德诺
Quantity:
20 000
In cases where the board temperature is known, use the thermal
characterization parameter, Ψ
temperature rise. Maximum junction temperature (T
calculated from the board temperature (T
dissipation (P
T
J
140
120
100
140
120
100
= T
80
60
40
20
80
60
40
20
0
0
0.5
0.5
B
MAX JUNCTION TEMPERATURE
MAX JUNCTION TEMPERATURE
+ (P
D
) using the formula
1.0
1.0
D
× Ψ
Figure 47. WLCSP, T
1.5
1.5
Figure 46. TSOT, T
JB
)
I
I
L
L
= 100mA
= 100mA
2.0
2.0
I
L
I
= 25mA
V
L
V
IN
IN
JB
= 25mA
, to estimate the junction
– V
– V
2.5
2.5
OUT
OUT
B
I
I
(V)
I
(V)
B
= 85°C
L
L
L
= 85°C
3.0
3.0
= 75mA
= 10mA
= 75mA
I
L
= 10mA
B
) and power
3.5
3.5
I
I
L
L
= 50mA
= 50mA
I
I
L
4.0
L
4.0
= 1mA
= 1mA
J
) is
4.5
4.5
Rev. A | Page 17 of 20
(5)
PCB LAYOUT CONSIDERATIONS
Improve heat dissipation from the package by increasing the
amount of copper attached to the pins of the ADP120. However,
as listed in Table 6, a point of diminishing returns is eventually
reached, beyond which an increase in the copper size does not
yield significant heat dissipation benefits.
Place the input capacitor as close as possible to the VIN and
GND pins. Place the output capacitor as close as possible to the
VOUT and GND pins. Use of 0402- or 0603-size capacitors and
resistors achieves the smallest possible footprint solution on
boards where area is limited.
ADP120CB-xx-EVALZ
GND
GND
VIN
J1
Figure 49. WLCSP PCB Layout
Figure 48. TSOT PCB Layout
EN
ANALOG DEVICES
ADP120-xx-EVALZ
C1
GND
VIN
U1
C2
C1
EN
J1
U1
WLC
SP
C2
GND
VOUT
VOUT
GND
GND
ADP120

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