LP2988AIM-3.3/NOPB National Semiconductor, LP2988AIM-3.3/NOPB Datasheet - Page 19

• Manufacturer Part Number: LP2988AIM-3.3/NOPB
• Description: IC REGULATOR MICROPWR LDO 8-SOIC
• Manufacturer: National Semiconductor

Specifications of LP2988AIM-3.3/NOPB

• Regulator Topology: Positive Fixed
• Voltage - Output: 3.3V
• Voltage - Input: Up to 16V
• Voltage - Dropout (typical): 0.18V @ 200mA
• Number Of Regulators: 1
• Current - Output: 200mA
• Current - Limit (min): 250mA
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *LP2988AIM-3.3; *LP2988AIM-3.3/NOPB; LP2988AIM-3.3

Application Hints
IMPORTANT: The output capacitor must maintain its ESR in
the stable region over the full operating temperature range of
the application to assure stability.
The minimum required amount of output capacitance is
4.7 µF. Output capacitor size can be increased without limit.
It is important to remember that capacitor tolerance and
variation with temperature must be taken into consideration
when selecting an output capacitor so that the minimum
required amount of output capacitance is provided over the
full operating temperature range. A good Tantalum capacitor
will show very little variation with temperature, but a ceramic
may not be as good (see next section).
The output capacitor should be located not more than 0.5”
from the output pin and returned to a clean analog ground.
CAPACITOR CHARACTERISTICS
TANTALUM: A solid tantalum capacitor is the best choice for
the output capacitor on the LM2987/8. Available from many
sources, their typical ESR is very close to the ideal value
required on the output of many LDO regulators.
Tantalums also have good temperature stability: a 4.7 µF
was tested and showed only a 10% decline in capacitance
as the temperature was decreased from +125˚C to −40˚C.
The ESR increased only about 2:1 over the same range of
temperature.
However, it should be noted that the increasing ESR at lower
temperatures present in all tantalums can cause oscillations
when marginal quality capacitors are used (where the ESR
of the capacitor is near the upper limit of the stability range at
room temperature).
CERAMIC: The ESR of ceramic capacitor can be low
enough to cause an LDO regulator to oscillate: a 2.2 µF
ceramic was measured and found to have an ESR of 15 mΩ.
If a ceramic capacitor is to be used on the LP2987/8 output,
a 1Ω resistor should be placed in series with the capacitor to
provide a minimum ESR for the regulator.
A disadvantage of ceramic capacitors is that their capaci-
tance varies a lot with temperature: Large ceramic capaci-
tors are typically manufactured with the Z5U temperature
characteristic, which results in the capacitance dropping by
50% as the temperature goes from 25˚C to 80˚C.
This means you have to buy a capacitor with twice the
minimum C
ALUMINUM: The large physical size of aluminum electrolyt-
ics makes them unsuitable for most applications. Their ESR
characteristics are also not well suited to the requirements of
LDO regulators. The ESR of a typical aluminum electrolytic
is higher than a tantalum, and it also varies greatly with
temperature.
A typical aluminum electrolytic can exhibit an ESR increase
of 50X when going from 20˚C to −40˚C. Also, some alumi-
num electrolytics can not be used below −25˚C because the
electrolyte will freeze.
OUT
to assure stable operation up to 80˚C.
(Continued)
19
POWER-ON RESET DELAY
A power-on reset function can be easily implemented using
the LP2987/8 by adding a single external capacitor to the
Delay pin. The Error output provides the power-on reset
signal when input power is applied to the regulator.
The reset signal stays low for a pre-set time period after
power is applied to the regulator, and then goes high (see
Timing Diagram below).
The external capacitor c
The value of capacitor required for a given time delay may
be calculated using the formula:
To simplify design, a plot is provided below which shows
values of C
DLY
Timing Diagram for Power-Up
versus delay time.
C
DLY
Plot of C
= T
DELAY
DLY
DLY
sets the delay time (T
/(5.59 X 10
vs T
DELAY
5
)
10001711
10001709
www.national.com
DELAY
).