HDMIULC6-2P6 STMicroelectronics, HDMIULC6-2P6 Datasheet - Page 7

• Manufacturer Part Number: HDMIULC6-2P6
• Description: IC HDMI ESD PROTECTION SOT-666
• Manufacturer: STMicroelectronics

Specifications of HDMIULC6-2P6

• Voltage - Reverse Standoff (typ): 5V
• Voltage - Breakdown: 6V
• Polarization: 2 Channel Array - Bidirectional
• Mounting Type: Surface Mount
• Package / Case: SOT-666
• Applications: General Purpose
• Number Of Circuits: 2
• Voltage - Working: 6V
• Voltage - Clamping: 12V
• Technology: Diode Array
• Channels: 2 Channels
• Clamping Voltage: 17 V
• Breakdown Voltage: 6 V
• Termination Style: SMD/SMT
• Capacitance: 0.5 pF
• Dimensions: 1.3 mm W x 1.7 mm L x 0.6 mm H
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 497-8754-2

HDMIULC6-2x6
3
3.1
Note:
3.2
Technical information
Surge protection
The HDMIULC6-2x6 is particularly optimized to perform ESD surge protection based on the
rail to rail topology.
The clamping voltage V
with: V
(V
and V
Calculation example
We assume that the value of the dynamic resistance of the clamping diode is typically:
R
We assume that the value of the dynamic resistance of the transil diode is typically
R
For an IEC 61000-4-2 surge Level 4 (Contact Discharge: V
V
We find:
The calculations do not take into account phenomena due to parasitic inductances.
Surge protection application example
If we consider that the connections from the pin V
GND to PCB GND plane are two tracks 10 mm long and 0.5 mm wide, we can assume that
the parasitic inductances, L
IEC 61000-4-2 surge occurs on the data line, due to the rise time of this spike (tr = 1 ns), the
voltage V
The dI/dt is calculated as: dI/dt = Ip/tr = 24 A/ns for an IEC 61000-4-2 surge level 4 (contact
discharge V
The over voltage due to the parasitic inductances is:
L
By taking into account the effect of these parasitic inductances due to unsuitable layout, the
clamping voltage will be:
We can reduce as much as possible these phenomena with simple layout optimization.
I/O
BUS
d
d_TRANSIL
F
= 0.5
.dI/dt = L
forward drop voltage) / (V
= +5 V, and, in first approximation, we assume that: I
TRANSIL
F
= V
CL
V
V
V
V
V
V
and V
CL
CL
= 0.5
CL
CL
g
CL
CL
T
has an extra value equal to L
GND
= 8 kV, R
+ R
+ = V
- = - V
= V
+ = +31.2 V
- = -13.1 V
+ = +31.2 + 144 +144 = 319.2 V
- = -13.1 - 144 -144 = -301.1 V
.dI/dt = 6 x 24 = 144 V
d
T
BR
.I
= 1.1 V.
TRANSIL
p
and V
F
+ R
g
CL
= 330
d_TRANSIL
BR
can be calculated as follows:
VBUS
+ V
= 6.1 V
T
forward drop threshold voltage)
F
, L
for positive surges
for negative surges
I/O
. I
P
, and L
I/O
GND
.dI/dt + L
, of these tracks are about 6 nH. So when an
BUS
GND
to V
.dI/dt.
CC
p
g
= 8 kV, R
= V
, from I/O to data line, and from
g
/ R
g
Technical information
g
= 24 A.
= 330
),
7/17