CS8141YTHA7 ON Semiconductor, CS8141YTHA7 Datasheet - Page 10

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CS8141YTHA7

Manufacturer Part Number
CS8141YTHA7
Description
IC REG LDO LIN 500MA 5V TO220-7
Manufacturer
ON Semiconductor
Datasheet

Specifications of CS8141YTHA7

Regulator Topology
Positive Fixed
Voltage - Output
5V
Voltage - Input
7 ~ 26 V
Voltage - Dropout (typical)
1.25V @ 500mA
Number Of Regulators
1
Current - Output
500mA
Current - Limit (min)
700mA
Operating Temperature
-40°C ~ 125°C
Mounting Type
Through Hole
Package / Case
TO-220-7 (Bent and Staggered Leads)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
CS8141YTHA7OS
and control features: RESET, ENABLE and WATCHDOG,
provides a single IC solution for a microprocessor power
supply. The reset delay, reset duration and watchdog
frequency limits are all determined by a single capacitor. For
a particular microprocessor the overriding requirement is
usually the reset delay (also known as power on reset). The
capacitor is chosen to meet this requirement and the reset
duration and watchdog frequency follow.
tolerance due to the regulator.
and 586 ms.
to the capacitor.
13.5 ms.
time. From a programmers point of view, time is more useful
since they must ensure that a watchdog signal is issued
consistently several times per second.
V
V
The CS8140 with its unique integration of linear regulator
The reset delay is given by:
Assume that the reset delay must be 200 ms minimum.
From the CS8140 data sheet the reset delay has a ±37%
Assume the capacitor tolerance is ±10%.
Closest standard value is 0.82 mF.
Minimum and maximum delays using 0.82 mF are 220 ms
The duration of the reset pulse is given by:
This has a tolerance of ±50% due to the IC, and ±10% due
The duration of the reset pulse ranges from 3.69 ms to
The watchdog signal can be expressed as a frequency or
R(PEAK)
t POR (min) + (4.75
RESET
V
R(LO)
R(HI)
T WDI(RESET) (typ) + (1.0
V
Figure 17. Power RESET and Power Down
OUT
V
t POR(typ) + (4.75
R(LO)
C DELAY (min) +
CS8140 DESIGN EXAMPLE
C DELAY (min) + 0.743 mF
t
POR
10 5
0.63)
2.69
t POR (min)
10 5) C DELAY
10 4)
10 5
C DELAY
C DELAY
APPLICATION NOTES
CS8140, CS8141
http://onsemi.com
0.9
10
V
by:
arrives at least every 76 ms but not faster than every 41 ms
(Figure 19).
CS8141 only has a lower watchdog frequency threshold.
Hz
ms
C = 0.1 mF ±10%
OUT
FAIL
t WDI(UPPER) + (3.82
t WDI(LOWER) + (1.3
t WDI(UPPER) + (3.82
The maximum and minimum watchdog times are given
There is a tolerance of ±20% due to the CS8140.
With a capacitor tolerance of ±10%:
The software must be written so that a watchdog signal
The CS8141 is identical to the CS8140 except that the
t WDI(LOWER) + (1.3
RESET
−4.5%
5.0 V
Figure 19. WDI Signal for C
V
Figure 18. Undervoltage Triggered RESET
OUT
141
7
t WDI(LOWER) + (1.3
t WDI(UPPER) + (3.82
t WDI(UPPER) + 22.5 ms (max)
t WDI(UPPER) + 41 ms (min)
t WDI(LOWER) + 141 ms (max)
t WDI(LOWER) + 76 ms (min)
107
9
< 2.0 ms
13
76
≥ 2.0 ms
CS8140
PASS
10 5 )
10 4 )
10 5 )
10 4 )
Delay
0.8
10 5 )C DELAY
1.2
1.2
24
41
10 4 )C DELAY
0.8
t
POR
= 0.82 mF using
0.9
1.1
1.1
32
0.9
31
C DELAY
22.5
C DELAY
44
C Delay
C Delay
FAIL

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