NCV4299D2 ON Semiconductor, NCV4299D2 Datasheet - Page 4

• Manufacturer Part Number: NCV4299D2
• Description: IC REG LDO 150MA 5V 14-SOIC
• Manufacturer: ON Semiconductor

Specifications of NCV4299D2

• Regulator Topology: Positive Fixed
• Voltage - Output: 5V
• Voltage - Input: Up to 45V
• Voltage - Dropout (typical): 0.22V @ 100mA
• Number Of Regulators: 1
• Current - Output: 150mA
• Current - Limit (min): 250mA
• Operating Temperature: -40°C ~ 150°C
• Mounting Type: Surface Mount
• Package / Case: 14-SOIC (3.9mm Width), 14-SOL
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. 14 pin package only.
2. Per IPC / JEDEC J−STD−020C.
3. This device series incorporates ESD protection and is tested by the following methods:
4. 2 oz Copper, 50 mm sq Copper area, 1.5 mm thick FR4
5. 2 oz Copper, 150 mm sq Copper area, 1.5 mm thick FR4
6. 2 oz Copper, 500 mm sq Copper area, 1.5 mm thick FR4
MAXIMUM RATINGS
THERMAL CHARACTERISTICS
OPERATING RANGE
LEAD TEMPERATURE SOLDERING REFLOW
Input Voltage to Regulator (DC)
Input Peak Transient Voltage to Regulator wrt GND
Inhibit (INH) (Note 1)
Sense Input (SI)
Sense Input (SI)
Reset Threshold (RADJ)
Reset Threshold (RADJ)
Reset Delay (D)
Reset Output (RO)
Sense Output (SO)
Output (Q)
Output (Q)
Junction Temperature
Storage Temperature
Input Voltage
Junction Temperature
Reflow (SMD styles only), lead free
60s−150 sec above 217, 40 sec max at peak
Moisture Sensitivity Level
SO−8
SO−14
ESD Capability, Human Body Model (Note 3)
ESD Capability, Machine Model (Note 3)
ESD Capability, Charged Device Model (Note 3)
5.0 V Version
3.3 V Version
ESD HBM tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD MM tested per AEC−Q100−003 (EIA/JESD22−A115)
ESD CDM tested per EIA/JES D22/C101, Field Induced Charge Model.
Junction−to−Tab (y
Junction−to−Ambient (R
Junction−to−Tab (y
Junction−to−Ambient (R
Characteristic
JLx
JLx
Rating
, q
, q
θJA
θJA
JLx
JLx
, q
, q
)
)
JA
JA
)
)
(Note 2)
http://onsemi.com
4
ESD
Symbol
ESD
ESD
V
I
T
V
MSL
RADJ
V
V
T
V
RADJ
V
V
I
T
T
SLD
V
I
V
INH
−
RO
stg
SI
SO
Q
SI
Q
Note 4
D
CDM
J
J
I
I
MM
HB
172
112
54
19
Test Conditions (Typical Value)
−0.3
−1.0
−0.3
−0.3
−0.3
−0.3
−0.3
−5.0
Min
−40
−40
−10
200
−50
−40
2.0
1.0
4.5
4.4
−
−
−
Note 5
144
52
21
89
Level 1
265 Pk
Max
150
150
150
Note 6
1.0
7.0
7.0
7.0
7.0
45
60
45
45
10
16
45
45
−
−
−
−
118
48
20
67
°C/W
°C/W
Unit
Unit
mA
mA
mA
kV
kV
°C
°C
°C
°C
V
V
V
V
V
V
V
V
V
V
V