MCF5251CVM140 Freescale Semiconductor, MCF5251CVM140 Datasheet - Page 18

• Manufacturer Part Number: MCF5251CVM140
• Description: IC MPU 32BIT 140MHZ 225-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF524xr

Specifications of MCF5251CVM140

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: ATA, Audio, CAN, EBI/EMI, I²C, IDE, MMC/SD, SPI, UART/USART, USB OTG
• Peripherals: DMA
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 3.6 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Embedded Interface Type: I2C, SPI, UART
• Digital Ic Case Style: BGA
• No. Of Pins: 225
• Operating Temperature Range: -40°C To +85°C
• Frequency Typ: 140MHz
• Rohs Compliant: Yes
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -

Electrical Specifications
4.5
Table 16
Figure 5
18
1
2
Note that output data may go invalid before rising edge of the clock. To clock data in reliably, you need to sample data, for
example, 2 ns before rising edge of clock.
Timing figure given takes 50% margin for noise and uncertainty on pin capacitance. Simulated clock-to-data, not taking noise
effects into account is 2.7 ns.
1
Clock period for DSCLK clock
Set-up time DSI, BKPT, to DSCLK rising edge
Hold time DSI, BKPT to DSCLK rising edge
Propagation delay DSCLK rising edge to TDO/DSO change
T denotes the CPU clock period. E.g. if the CPU is running at 100 MHz, T = 10 ns
provides the JTAG timing diagram and
provides the BDM timing parameters.
BDM and JTAG Timing
Boundary Scan
Boundary Scan
Data
Data
TDI, TMS
TCK
MCF5251 ColdFire Processor Data Sheet: Technical Data, Rev. 3
Output
TRST
TDO
Input
Characteristic
Table 16. BDM Interface Timing Parameters
J2A
Figure 5. JTAG Timing Diagram
J1
J11
J9
J6
J4
Table 17
J7
J5
J1
provides the JTAG timing parameters.
J10
J12
J2B
Min
4.0
3T
—
—
J3A
4T + 32
T+ 4.0
Max
5T
—
1
Freescale Semiconductor
Units
J3B
ns
ns
ns
ns