MCF5251VM140 Freescale Semiconductor, MCF5251VM140 Datasheet - Page 16

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MCF5251VM140

Manufacturer Part Number
MCF5251VM140
Description
IC MPU 32BIT 140MHZ 225-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF525xr

Specifications of MCF5251VM140

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
140MHz
Connectivity
ATA, Audio, CAN, EBI/EMI, I²C, IDE, MMC/SD, SPI, UART/USART, USB OTG
Peripherals
DMA
Program Memory Type
ROMless
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 3.6 V
Data Converters
A/D 6x12b
Oscillator Type
External
Operating Temperature
-20°C ~ 70°C
Package / Case
225-MAPBGA
Embedded Interface Type
I2C, SPI, UART
Digital Ic Case Style
BGA
No. Of Pins
225
Operating Temperature Range
-20°C To +70°C
Frequency Typ
140MHz
Rohs Compliant
Yes
Family Name
MCF5xxx
Device Core
ColdFire V2
Device Core Size
32b
Frequency (max)
140MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.2/3.3V
Operating Supply Voltage (max)
1.32/3.6V
Operating Supply Voltage (min)
1.08/3V
Operating Temp Range
-20C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
225
Package Type
MA-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF5251VM140
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Electrical Specifications
Table 12
4.1
The SDRAM bus is a synchronous bus. Propagation delays, set-up times and hold times with respect to
the SDRAM clock BCLK are shown in
clock is not active, SDRAM interface is not valid and the external bus cannot be used.
16
Frequency
Frequency Tolerance
Frequency Stability Over Operating Temperature Range
ESR
Shunt Capacitance
Load Capacitance
shows the CRIN Crystal suggested parameters.
SDRAM Bus Timing
MCF5251 ColdFire Processor Data Sheet: Technical Data, Rev. 3
Parameter
BCLKE, SDXDQM, SDWE,
SDCS0, SDRAS, SDCAS
Table 12. CRIN Crystal Suggested Parameters
Figure 4. SDRAM Bus Timing Diagram
data (write)
Figure 4
BCLK
A[24:9]
and the parameters provided in
data (read)
D3
D1
D2
D4
D5
Min
5
Typ
18
40
7
Table
Freescale Semiconductor
16.94
Max
±50
±50
13. When BCLK
MHz
Unit
ppm
ppm
pF
pF
Ω

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