XR16C864IQ-F Exar Corporation, XR16C864IQ-F Datasheet - Page 50
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XR16C864IQ-F
Manufacturer Part Number
XR16C864IQ-F
Description
IC UART FIFO 128B QUAD 100QFP
Manufacturer
Exar Corporation
Type
Quad UART with 128-byte FIFOsr
Datasheet
1.XR16C864IQ-F.pdf
(51 pages)
Specifications of XR16C864IQ-F
Number Of Channels
4, QUART
Package / Case
100-BQFP
Features
*
Fifo's
128 Byte
Protocol
RS232, RS485
Voltage - Supply
2.97 V ~ 5.5 V
With Auto Flow Control
Yes
With Irda Encoder/decoder
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Data Rate
2 Mbps
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.97 V
Supply Current
3 mA to 6 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Operating Supply Voltage
2.97 V to 5.5 V
No. Of Channels
4
Uart Features
Tx/Rx FIFO Counters
Supply Voltage Range
2.97V To 5.5V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
QFP
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
1016-1277
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XR16C864IQ-F
Manufacturer:
NAIS
Quantity:
420
Company:
Part Number:
XR16C864IQ-F
Manufacturer:
Exar Corporation
Quantity:
10 000
XR16C864
2.97V TO 5.5V QUAD UART WITH 128-BYTE FIFO
GENERAL DESCRIPTION .................................................................................................1
PIN DESCRIPTIONS .........................................................................................................3
1.0 PRODUCT DESCRIPTION .....................................................................................................................8
2.0 FUNCTIONAL DESCRIPTIONS .............................................................................................................9
3.0 UART INTERNAL REGISTERS ...........................................................................................................22
4.0 INTERNAL REGISTER DESCRIPTIONS .............................................................................................25
F
A
ORDERING INFORMATION
EATURES
PPLICATIONS
2.1 CPU INTERFACE .............................................................................................................................................. 9
2.2 5-VOLT TOLERANT INPUTS ......................................................................................................................... 10
2.3 DEVICE RESET .............................................................................................................................................. 10
2.4 DEVICE IDENTIFICATION AND REVISION ................................................................................................... 10
2.5 CHANNEL SELECTION .................................................................................................................................. 10
2.6 CHANNELS A-D INTERNAL REGISTERS .................................................................................................... 11
2.7 INT OUPUTS FOR CHANNELS A-D .............................................................................................................. 11
2.8 DIRECT MEMORY ACCESS .......................................................................................................................... 12
2.9 DMA MODE ..................................................................................................................................................... 12
2.10 CRYSTAL OSCILLATOR OR EXTERNAL CLOCK INPUT ......................................................................... 12
2.11 PROGRAMMABLE BAUD RATE GENERATOR ......................................................................................... 13
2.12 TRANSMITTER ............................................................................................................................................. 13
2.13 RECEIVER .................................................................................................................................................... 15
2.14 AUTO RTS HARDWARE FLOW CONTROL ................................................................................................ 16
2.15
2.16
2.17 AUTO XON/XOFF (SOFTWARE) FLOW CONTROL ................................................................................... 17
2.18
2.19
2.20 INFRARED MODE ........................................................................................................................................ 18
2.21
2.22
4.1 RECEIVE HOLDING REGISTER (RHR) - READ- ONLY ............................................................................... 25
4.2 TRANSMIT HOLDING REGISTER (THR) - WRITE-ONLY ............................................................................ 25
4.3 INTERRUPT ENABLE REGISTER (IER) - READ/WRITE .............................................................................. 25
F
F
F
T
T
T
T
F
T
F
T
F
F
F
F
F
T
F
F
T
T
IGURE
IGURE
IGURE
ABLE
ABLE
ABLE
ABLE
IGURE
ABLE
IGURE
ABLE
IGURE
IGURE
IGURE
IGURE
IGURE
ABLE
IGURE
IGURE
ABLE
ABLE
2.12.1 TRANSMIT HOLDING REGISTER (THR) - WRITE ONLY ....................................................................................... 14
2.12.2 TRANSMITTER OPERATION IN NON-FIFO MODE ................................................................................................ 14
2.12.3 TRANSMITTER OPERATION IN FIFO MODE ......................................................................................................... 14
2.13.1 RECEIVE HOLDING REGISTER (RHR) - READ-ONLY .......................................................................................... 15
AUTO RTS HYSTERESIS ............................................................................................................................ 16
AUTO CTS FLOW CONTROL ..................................................................................................................... 16
SPECIAL CHARACTER DETECT ............................................................................................................... 18
AUTO RS485 HALF-DUPLEX CONTROL .................................................................................................. 18
SLEEP MODE WITH AUTO WAKE-UP ....................................................................................................... 19
INTERNAL LOOPBACK .............................................................................................................................. 20
1: C
2: C
3: INT P
4: INT P
5: TXRDY#
6: T
7: A
8:
9:
1. XR16C864 B
2. XR16C864 P
3. XR16C864/864D T
4. T
5. B
6. T
7. T
8. R
9. R
10. A
11. I
12. I
.....................................................................................................................................................1
UART CHANNEL A AND B UART INTERNAL REGISTERS...................................................................................... 22
INTERNAL REGISTERS DESCRIPTION. S
YPICAL DATA RATES WITH A
UTO
HANNEL
HANNEL
YPICAL OSCILATOR CONNECTIONSL
RANSMITTER
RANSMITTER
AUD
ECEIVER
ECEIVER
NFRARED
NTERNAL
................................................................................................................................................1
UTO
INS
IN
X
R
ON
O
RTS
ATE
O
AND
A-D S
A-D S
PERATION FOR
/X
PERATION FOR
O
O
L
OFF
T
G
PERATION IN NON
PERATION IN
OOP
AND
RANSMIT
RXRDY# O
LOCK
IN
ENERATOR AND
O
O
.................................................................................................................................3
ELECT IN
ELECT IN
(S
O
PERATION IN NON
PERATION IN
CTS F
B
UT
OFTWARE
ACK IN
D
YPICAL
IAGRAM
A
D
SSIGNMENT
ATA
R
LOW
16 M
68 M
T
FIFO
UTPUTS IN
ECEIVER FOR
C
RANSMITTER FOR
I
14.7456 MH
NTEL
) F
HANNELS
E
........................................................................................................................................... 1
FIFO
C
-FIFO M
ODE
ODE
P
NCODING AND
LOW
TABLE OF CONTENTS
ONTROL
AND
RESCALER
/M
-FIFO M
................................................................................................................................. 10
................................................................................................................................. 11
I
AND
N
OTOROLA
............................................................................................................................... 12
C
A
FIFO
16
UTO
ONTROL
A-D ..................................................................................................................... 21
ODE
C
O
F
Z CRYSTAL OR EXTERNAL CLOCK
AND
HANNELS
LOW
PERATION
..................................................................................................................... 13
ODE
RTS F
AND
.................................................................................................................... 15
R
C
D
68 M
HADED BITS ARE ENABLED WHEN
............................................................................................................... 18
ECEIVE
HANNELS
C
.............................................................................................................. 14
ATA
DMA M
áç
áç
áç
áç
ONTROL
LOW
REV. 2.0.1
ODE
A-D ................................................................................................. 11
B
....................................................................................................... 17
1
US
D
C
ODE FOR
................................................................................................... 2
ATA
ONTROL
A-D ......................................................................................... 11
I
M
NTERCONNECTIONS
ODE
D
ECODING
..................................................................................... 14
C
M
HANNELS
ODE
.......................................................................... 19
......................................................................... 16
...................................................................... 13
A-D ........................................................... 12
................................................................... 9
EFR B
IT
-4=1......................................... 23