XR16L788IQ-F Exar Corporation, XR16L788IQ-F Datasheet - Page 38
![IC UART 64B 3.3V OCTAL 100QFP](/photos/29/6/290689/tqfp100_sml.jpg)
XR16L788IQ-F
Manufacturer Part Number
XR16L788IQ-F
Description
IC UART 64B 3.3V OCTAL 100QFP
Manufacturer
Exar Corporation
Type
IrDA or RS- 485r
Datasheet
1.XR16L788CQ-F.pdf
(54 pages)
Specifications of XR16L788IQ-F
Number Of Channels
8
Package / Case
100-BQFP
Features
*
Fifo's
64 Byte
Protocol
RS485
Voltage - Supply
2.97 V ~ 5.5 V
With Auto Flow Control
Yes
With Irda Encoder/decoder
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
Mounting Type
Surface Mount
Data Rate
6.25 Mbps
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.97 V
Supply Current
5 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V or 5 V
No. Of Channels
8
Uart Features
Tx/Rx FIFO Counters
Supply Voltage Range
2.97V To 5.5V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
QFP
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
1016-1284
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XR16L788IQ-F
Manufacturer:
Exar Corporation
Quantity:
10 000
Part Number:
XR16L788IQ-F
Manufacturer:
EXAR/艾科嘉
Quantity:
20 000
XR16L788
HIGH PERFORMANCE 2.97V TO 5.5V OCTAL UART
This is a 8-bit general purpose register for the user to store temporary data. The content of this register is
preserved during sleep mode but becomes 0xFF (default) after a reset or a power off-on cycle.
This register controls the UART enhanced functions that are not available on ST16C554 or ST16C654.
FCTR [3:0] - Auto RTS/DTR Flow Control Hysteresis Select
These bits select the auto RTS/DTR flow control hysteresis and only valid when TX and RX Trigger Table-D is
selected (FCTR bit-6 and 7 are set to logic 1). The RTS/DTR hysteresis is referenced to the RX FIFO trigger
level. After reset, these bits are set to logic 0 selecting the next FIFO trigger level for hardware flow control.
Table 17
4.11
4.12
T
SCRATCH PAD REGISTER (SPR) - Read/Write
FEATURE CONTROL REGISTER (FCTR) - Read/Write
ABLE
below shows the 16 selectable hysteresis levels.
16: A
UTO
MSR[7]
RS485 H
0
0
0
0
0
9
0
0
1
1
1
1
1
1
1
1
MSR[6]
ALF
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
-
DUPLEX
MSR[5]
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
D
IRECTION
MSR[4]
38
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
C
ONTROL
D
ELAY IN
D
ELAY FROM
D
ATA
10
12
13
14
15
11
0
1
2
3
4
5
6
7
8
9
B
IT
T
(
S
RANSMIT
) T
IME
-
TO
-R
ECEIVE
REV. 1.2.3