ALD1706GSAL Advanced Linear Devices Inc, ALD1706GSAL Datasheet - Page 4
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ALD1706GSAL
Manufacturer Part Number
ALD1706GSAL
Description
IC OPAMP GP R-R CMOS 8SOIC
Manufacturer
Advanced Linear Devices Inc
Datasheet
1.ALD1706GSAL.pdf
(9 pages)
Specifications of ALD1706GSAL
Amplifier Type
General Purpose
Number Of Circuits
1
Output Type
Rail-to-Rail
Slew Rate
0.17 V/µs
Gain Bandwidth Product
400kHz
Current - Input Bias
0.1pA
Voltage - Input Offset
10000µV
Current - Supply
20µA
Current - Output / Channel
200µA
Voltage - Supply, Single/dual (±)
2 V ~ 12 V, ±1 V ~ 6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (0.154", 3.90mm Width)
Common Mode Rejection Ratio (min)
83 dB
Input Voltage Range (max)
5.3 V
Input Voltage Range (min)
- 0.3 V
Input Offset Voltage
10 uV
Supply Current
20 uA
Maximum Power Dissipation
250 mW
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
-3db Bandwidth
-
Lead Free Status / Rohs Status
Details
Other names
1014-1084
ALD1706A/ALD1706B
ALD1706/ALD1706G
Design & Operating Notes:
1. The ALD1706A/ALD1706B/ALD1706/ALD1706G CMOS operational
2. The ALD1706A/ALD1706B/ALD1706/ALD1706G has complementary
3. The input bias and offset currents are essentially input protection
amplifier uses a 3 gain stage architecture and an improved
frequency compensation scheme to achieve large voltage gain,
high output driving capability, and better frequency stability. In a
conventional CMOS operational amplifier design, compensation
is achieved with a pole splitting capacitor together with a nulling
resistor. This method is, however, very bias dependent and thus
cannot accommodate the large range of supply voltage operation
as is required from a stand alone CMOS operational amplifier. The
ALD1706A/ALD1706B/ALD1706/ALD1706G
compensated for unity gain stability using a novel scheme that does
not use a nulling resistor. This scheme produces a clean single
pole roll off in the gain characteristics while providing for more
than 70 degrees of phase margin at the unity gain frequency.
p-channel and n-channel input differential stages connected in
parallel to accomplish rail-to-rail input common mode voltage range.
This means that with the ranges of common mode input voltage
close to the power supplies, one of the two differential stages is
switched off internally. To maintain compatibility with other
operational amplifiers, this switching point has been selected to
be about 1.5V below the positive supply voltage. Since offset
voltage trimming on the ALD1706A/ALD1706B/ALD1706/ALD1706G
is made when the input voltage is symmetrical to the supply
voltages, this internal switching does not affect a large variety of
applications such as an inverting amplifier or non-inverting amplifier
with a gain larger than 2.5 (5V operation), where the common mode
voltage does not make excursions above this switching point. The
user should however, be aware that this switching does take place
if the operational amplifier is connected as a unity gain buffer and
should make provision in his design to allow for input offset voltage
variations.
diode reverse bias leakage currents, and are typically less than
1000
100
80
40
20
10
60
OPEN LOOP VOLTAGE GAIN AS AFUNCTION
0
1
10K
0
INPUTS GROUNDED
OUTPUT UNLOADED
SUPPLY CURRENT AS A FUNCTION
±1
OF LOAD RESISTANCE
OF SUPPLY VOLTAGE
SUPPLY VOLTAGE (V)
100K
T
LOAD RESISTANCE (Ω)
±2
A
= -55°C
TYPICAL PERFORMANCE CHARACTERISTICS
±3
-25°C
+70°C
1M
±4
+25°C
V
T
A
S
+125°C
±5
= ±2.5V
= 25°C
is
Advanced Linear Devices
10M
internally
±6
4. The output stage consists of class AB complementary output
5. The ALD1706A/ALD1706B/ALD1706/ALD1706G operational
6. The ALD1706A/ALD1706B/ALD1706/ALD1706G , with its micropower
1pA at room temperature. This low input bias current assures that
the analog signal from the source will not be distorted by input
bias currents. Normally, this extremely high input impedance of
greater than 10
would limit the node impedance. However, for applications where
source impedance is very high, it may be necessary to limit noise
and hum pickup through proper shielding.
drivers, capable of driving a low resistance load. The output voltage
swing is limited by the drain to source on-resistance of the output
transistors as determined by the bias circuitry, and the value of the
load resistor. When connected in the voltage follower configuration,
the oscillation resistant feature, combined with the rail to rail input
and output feature, makes an effective analog signal buffer for
medium to high source impedance sensors, transducers, and other
circuit networks.
amplifier has been designed to provide full static discharge
protection. Internally, the design has been carefully implemented
to minimize latch up. However, care must be exercised when
handling the device to avoid strong static fields that may degrade
a diode junction, causing increased input leakage currents. In using
the operational amplifier, the user is advised to power up the circuit
before, or simultaneously with, any input voltages applied and to
limit input voltages to not exceed 0.3V of the power supply voltage
levels.
operation, offers numerous benefits in reduced power supply
requirements, less noise coupling and current spikes, less thermally
induced drift, better overall reliability due to lower self heating, and
lower input bias current. It requires practically no warm up time as
the chip junction heats less than 0.1°C above ambient temperature
under most operating conditions.
10000
1000
100
1.0
0.1
±7
±6
±5
±4
±3
±2
±1
10
0
COMMON MODE INPUT VOLTAGE RANGE
-50
0
AS A FUNCTION OF SUPPLY VOLTAGE
INPUT BIAS CURRENT AS A FUNCTION
12
Ω would not be a problem as the source impedance
±1
-25
T
V
OF AMBIENT TEMPERATURE
A
S
= 25°C
= ±2.5V
AMBIENT TEMPERATURE (°C)
±2
0
SUPPLY VOLTAGE (V)
±3
25
±4
50
±5
75
±6
100
±7
125
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