ALD1702ASAL Advanced Linear Devices Inc, ALD1702ASAL Datasheet - Page 4

• Manufacturer Part Number: ALD1702ASAL
• Description: IC OPAMP GP R-R CMOS 8SOIC
• Manufacturer: Advanced Linear Devices Inc

Specifications of ALD1702ASAL

• Amplifier Type: General Purpose
• Number Of Circuits: 1
• Output Type: Rail-to-Rail
• Slew Rate: 2.8 V/µs
• Gain Bandwidth Product: 1.7MHz
• Current - Input Bias: 1pA
• Voltage - Input Offset: 900µV
• Current - Supply: 1.1mA
• Current - Output / Channel: 8mA
• Voltage - Supply, Single/dual (±): 4 V ~ 12 V, ±2 V ~ 6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Number Of Channels: 1
• Voltage Gain Db: 107.96 dB
• Common Mode Rejection Ratio (min): 70 dB
• Input Offset Voltage: 0.9 mV
• Operating Supply Voltage: 3 V, 5, V, 9 V
• Supply Current: 2 mA
• Maximum Power Dissipation: 10 mW
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Maximum Dual Supply Voltage: +/- 6 V
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• -3db Bandwidth: -
• Lead Free Status / Rohs Status: Details
• Other names: 1014-1078

ALD1702A/ALD1702B
ALD1702/ALD1703
Design & Operating Notes:
1. The ALD1702A/ALD1702B/ALD1702/ALD1703 CMOS operational
2. The ALD1702A/ALD1702B/ALD1702/ALD1703 has complementary
amplifier uses a 3 gain stage architecture and an improved
frequency compensation scheme to achieve large voltage gain,
high output driving capability, and better frequency stability. In a
conventional CMOS operational amplifier design, compensation
is achieved with a pole splitting capacitor together with a nulling
resistor. This method is, however, very bias dependent and thus
cannot accommodate the large range of supply voltage operation
as is required from a stand alone CMOS operational amplifier.
The ALD1702A/ALD1702B/ALD1702/ALD1703 is internally
compensated for unity gain stability using a novel scheme that
does not use a nulling resistor. This scheme produces a clean
single pole roll off in the gain characteristics while providing for
more than 70 degrees of phase margin at the unity gain frequency.
A unity gain buffer using the ALD1702A/ALD1702B/ALD1702/
ALD1703 will typically drive 400pF of external load capacitance
without stability problems. In the inverting unity gain configuration,
it can drive up to 800pF of load capacitance. Compared to other
CMOS operational amplifiers, the ALD1702A/ALD1702B/ALD1702/
ALD1703 has shown itself to be more resistant to parasitic
oscillations.
p-channel and n-channel input differential stages connected in parallel
to accomplish rail to rail input common mode voltage range. This
means that with the ranges of common mode input voltage close to
the power supplies, one of the two differential stages is switched off
internally. To maintain compatibility with other operational amplifiers,
this switching point has been selected to be about 1.5V above the
negative supply voltage. Since offset voltage trimming on the
ALD1702A/ALD1702B/ALD1702/ALD1703 is made when the input
voltage is symmetrical to the supply voltages, this internal switching
does not affect a large variety of applications such as an inverting
amplifier or non-inverting amplifier with a gain larger than 2.5 (5V
10000
1000
100
1.0
0.1
±7
±6
±5
±4
±3
±2
±1
10
0
-50
COMMON MODE INPUT VOLTAGE RANGE
0
INPUT BIAS CURRENT AS A FUNCTION
AS A FUNCTION OF SUPPLY VOLTAGE
-25
±1
OF AMBIENT TEMPERATURE
V
T
S
A
= ± 2.5V
= 25°C
AMBIENT TEMPERATURE (°C)
±2
0
SUPPLY VOLTAGE (V)
±3
25
TYPICAL PERFORMANCE CHARACTERISTICS
±4
50
±5
75
±6
100
Advanced Linear Devices
125
±7
3. The input bias and offset currents are essentially input protection diode
4. The output stage consists of class AB complementary output drivers,
5. The ALD1702A/ALD1702B/ALD1702/ALD1703 operational amplifier
operation), where the common mode voltage does not make excursions
below this switching point. The user should however, be aware that
this switching does take place if the operational amplifier is connected
as a unity gain buffer and should make provision in his design to allow
for input offset voltage variations.
reverse bias leakage currents, and are typically less than 1pA at room
temperature. This low input bias current assures that the analog signal
from the source will not be distorted by input bias currents. Normally,
this extremely high input impedance of greater than 10
be a problem as the source impedance would limit the node impedance.
However, for applications where source impedance is very high, it may
be necessary to limit noise and hum pickup through proper shielding.
capable of driving a low resistance load. The output voltage swing is
limited by the drain to source on-resistance of the output transistors
as determined by the bias circuitry, and the value of the load resistor.
When connected in the voltage follower configuration, the oscillation
resistant feature, combined with the rail to rail input and output feature,
makes an effective analog signal buffer for medium to high source
impedance sensors, transducers, and other circuit networks.
has been designed to provide full static discharge protection. Internally,
the design has been carefully implemented to minimize latch up.
However, care must be exercised when handling the device to avoid
strong static fields that may degrade a diode junction, causing increased
input leakage currents. In using the operational amplifier, the user is
advised to power up the circuit before, or simultaneously with, any
input voltages applied and to limit input voltages to not exceed 0.3V of
the power supply voltage levels.
1000
100
10
±5
±4
±3
±1
±2
OPEN LOOP VOLTAGE GAIN AS A FUNCTION
1
0
OF SUPPLY VOLTAGE AND TEMPERATURE
0
0
SUPPLY CURRENT AS A FUNCTION
T
A
±1
= -55ºC
+125°C
+25°C
+80°C
-25°C
OF SUPPLY VOLTAGE
±2
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
±2
±3
INPUTS GROUNDED
OUTPUT UNLOADED
±4
±4
}
}
}
+25°C
+125°C
-55°C
±6
R
R
L
L
±5
= 10KΩ
= 5KΩ
12
±6
±8
Ω would not
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