78M6618-IM/F Maxim Integrated Products, 78M6618-IM/F Datasheet - Page 8

IC PWR MEASUREMENT OCTAL 68-QFN

78M6618-IM/F

Manufacturer Part Number
78M6618-IM/F
Description
IC PWR MEASUREMENT OCTAL 68-QFN
Manufacturer
Maxim Integrated Products
Type
Octal Power and Energy Measurement ICr
Datasheet

Specifications of 78M6618-IM/F

Core
80515
Core Architecture
80515
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
SPI, UART
Maximum Clock Frequency
500 KHz
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Programmable I/os
19
Number Of Timers
1
On-chip Adc
21 bit, 10 Channel
Operating Supply Voltage
3.3 V
Package / Case
QFN-68
Processor Series
78M6618
Program Memory Size
128 KB
Program Memory Type
Flash
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
78M6618-IM/F
Manufacturer:
ATMEL
Quantity:
240
78M6618 Data Sheet
See the 78M6618 Programmer’s Reference Manual for more information regarding the programmability
of the 78M6618 AFE.
1.4.1 Analog Current and Voltage Inputs
Pins IA, IB, IC, ID, IE, IF, IG, IH, VA, VB are analog inputs the AFE that provide support for measuring
current and voltage in a variety of ways. Various current sensor technologies are supported including
Current Transformers (CT), Resistive Shunts and Rogowski coils.
1.5
The CE, a dedicated 32-bit digital signal processor, performs the precision computations necessary to
accurately measure energy. Typically CE calculations and processes include:
See the 78M6618 Programmer’s Reference Manual for more information on interfacing to and
configuration of the 78M6618 CE.
1.6
The 78M6618 includes an 80515 MPU (8-bit, 8051-compatible) that processes most instructions in one clock
cycle. The 80515 architecture eliminates redundant bus states and implements parallel execution of fetch and
execution phases. Normally, a machine cycle is aligned with a memory fetch, therefore, most of the 1-byte
instructions are performed in a single machine cycle (MPU clock cycle). This leads to an 8x average
performance improvement (in terms of MIPS) over the Intel
See the 78M6618 Programmer’s Reference Manual for more information regarding the programmability of
MPU Memory Organization, Special Function Registers, Interrupts, Counters, and other CPU controls.
8
Scaling of the processed samples based on calibration coefficients.
Frequency-insensitive delay cancellation on all channels
90° phase shifter (for narrowband VAR calculations).
Monitoring of the input signal frequency (for frequency and phase information).
Monitoring of the input signal amplitude (for sag detection).
Multiplication of each voltage and current sample to obtain the energy per sample.
RTM(Real Time Monitor) for debug purposes
Pulse Generators used to output CE status indicators (e.g. SAG) directly to designated DIO pins.
Due to the custom nature and complexity of the CE, generally, pre-compiled CE code is provided by
Teridian as a part of the available reference firmware and is not modified by the user. Please contact
Teridian support for more information regarding CE code.
Digital Computation Engine (CE)
80515 MPU Core
VA
VB
IG
IC
IA
IB
ID
IE
IH
IF
TEMP
VBAT
CTRL
MUX
MUX
MUX
Figure 2: AFE Block Diagram
CROSS
CK32
VBIAS
VREF
VREF
FIR_DONE
FIR_START
V3P3A
VBIAS
8051 device running at the same clock frequency.
+
VREF
-
CONVERTER
4.9152 MHz
∆Σ ADC
FIR
DS_6618_005
Rev. 1.4

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