73M1966B-DB-C Maxim Integrated Products, 73M1966B-DB-C Datasheet - Page 62

• Manufacturer Part Number: 73M1966B-DB-C
• Description: BOARD DEMO 73M1966B CBL 20TSSOP
• Manufacturer: Maxim Integrated Products

Specifications of 73M1966B-DB-C

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

73M1866B/73M1966B Data Sheet
62
Function
Mnemonic
RSTLSBI
SLHS
SLLS
SYNL
Register
Location
0x0D[3]
0x0D[6]
0x1E[2]
0x03[1]
Type
W
R
R
R
Reset Line-Side Barrier Interface
To reset the Line-Side Barrier Interface, set this bit to 1.
1 = Resets the Line-Side Barrier Interface. The chip sets this bit back
to 0 after it has completed resetting the Line-Side Barrier Interface.
Synchronization Lost Host Side
This bit indicates the status of the Barrier Interface as seen from the
Host-Side.
0 = Host-Side Barrier Interface is synchronized.
1 = Host-Side Barrier Interface lost synchronization.
Once read, the SLHS bit is reset, but will be set again if the
synchronization loss continues.
Synchronization Loss Line Side
0 = TXRDY will continuously be generated following Synchronization
Loss so as to allow
barrier. This causes an automatic transfer of 1Eh. (Default)
1 = Synchronization is lost in the Line-Side Device due to Header.
Barrier Synchronization Loss
0 = Indicates synchronization of data across the barrier.
1 = Indicates a loss of synchronization of data across the barrier.
This status bit is reset when read. This is a maskable interrupt. It is
enabled by the ENSYNL bit.
SLLS
information to be transferred across the
Description
DS_1x66B_001
Rev. 1.6