DK-DEV-4SGX530N Altera, DK-DEV-4SGX530N Datasheet - Page 27

• Manufacturer Part Number: DK-DEV-4SGX530N
• Description: KIT DEVELOPMENT STRATIX IV
• Manufacturer: Altera
• Series: Stratix® IV GXr
• Type: FPGAr

Specifications of DK-DEV-4SGX530N

• Contents: Board, Cable, Documentation, Power Supply
• For Use With/related Products: Stratix® IV GX
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2714

Chapter 6: Board Test System
Preparing the Board
Preparing the Board
Running the Board Test System
August 2010 Altera Corporation
1
1
The Board Test System and Power Monitor share the JTAG bus with other
applications like the Nios II debugger and the SignalTap
Analyzer. Because the Quartus II programmer uses most of the bandwidth of the
JTAG bus, other applications using the JTAG bus might time out. Be sure to close the
other applications before attempting to reconfigure the FPGA using the Quartus II
Programmer.
With the power to the board off, perform the following steps:
1. Connect the USB cable to the board.
2. Verify the settings for the board settings DIP switch bank (SW4) match
3. Set the rotary switch (SW2) to the 1 position.
4. Verify the settings for the JTAG DIP switch bank (SW6), located on the back of the
5. Turn the power to the board on. The board loads the design stored in the user
To run the application, navigate to the
<install dir>\kits\stratixIVGX_4sgx230_fpga\examples\board_test_system
directory and run the BoardTestSystem.exe application.
On Windows, click Start > All Programs > Altera > Stratix IV GX FPGA
Development Kit <version> > Board Test System to run the application.
A GUI appears, displaying the application tab that corresponds to the design running
in the FPGA. The Stratix IV GX FPGA development board’s flash memory ships
preconfigured with the design that corresponds to the Config, GPIO, and
SRAM&Flash tabs.
on page
board, match
include in the JTAG chain.
f
hardware portion of flash memory into the FPGA. If your board is still in the
factory configuration or if you have downloaded a newer version of the Board Test
System to flash memory through the Board Update Portal, the design that loads
tests accessing the GPIO, SRAM, and flash memory.
c
For more information about the board’s DIP switch and jumper settings,
refer to the
To ensure operating stability, keep the USB cable connected and the board
powered on when running the demonstration application. The application
cannot run correctly unless the USB cable is attached and the board is on.
4–3.
Table 4–4 on page
Stratix IV GX FPGA Development Board Reference
4–5. These settings determine the devices to
Stratix IV GX FPGA Development Kit User Guide
®
II Embedded Logic
Manual.
Table 4–2
6–3