4320-DKDB2 Silicon Laboratories Inc, 4320-DKDB2 Datasheet



Manufacturer Part Number
Silicon Laboratories Inc

Specifications of 4320-DKDB2

Accessory Type
Test Card, Receiver, 434MHz
Wireless Frequency
434 MHz
Interface Type
For Use With/related Products
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Si4320 Universal ISM
Band FSK Receiver
Silicon Labs’ Si4320 is a single chip, low power, multi-channel FSK
receiver designed for use in applications requiring FCC or ETSI
conformance for unlicensed use in the 315, 433, 868, and 915 MHz
bands. Used in conjunction with Si4220/21, Silicon Labs’ FSK
transmitters, the Si4320 is a flexible, low cost, and highly integrated
solution that does not require production alignments. All required RF
functions are integrated. Only an external crystal and bypass filtering are
needed for operation.
The Si4320 has a completely integrated PLL for easy RF design, and its
rapid settling time allows for fast frequency hopping, bypassing multipath
fading, and interference to achieve robust wireless links. The PLL’s high
resolution allows the usage of multiple channels in any of the bands. The
baseband bandwidth (BW) is programmable to accommodate various
deviation, data rate, and crystal tolerance requirements. The receiver
employs the Zero-IF approach with I/Q demodulation, therefore no external
components (except crystal and decoupling) are needed in a typical
application. The Si4320 is a complete analog RF and baseband receiver
including a multi-band PLL synthesizer with an LNA, I/Q down converter
mixers, baseband filters and amplifiers, and I/Q demodulator.
The chip dramatically reduces the load on the microcontroller with
integrated digital data processing: data filtering, clock recovery, data
pattern recognition and integrated FIFO. The automatic frequency control
(AFC) feature allows using a low accuracy (low cost) crystal. To minimize
the system cost, the chip can provide a clock signal for the microcontroller,
avoiding the need for two crystals.
For simple applications, the receiver supports a standalone operation
mode. This allows complete data receiver operation and control of four
digital outputs based on the incoming data pattern without a
microcontroller. In this mode, 12 or more predefined frequency channels
can be used in any of the four bands. For low power applications, the
device supports low duty-cycle operation based on the internal wake-up
Si4320-DS Rev 1.5r 0308
 Fully integrated (low BOM, easy design-in)
 No alignment required in production
 Fast settling, programmable, high-resolution PLL
 Fast frequency hopping capability
 High bit rate (up to 115.2 kbps in digital mode and 256 kbps
 Direct differential antenna input
 Programmable baseband bandwidth (67 to 400 kHz)
 Analog and digital RSSI outputs
 Automatic frequency control (AFC)
 Data quality detection (DQD)
 Internal data filtering and clock recovery
 RX pattern recognition
 SPI compatible serial control interface
 Clock and reset signals for microcontroller
 16 bit RX data FIFO
 Standalone operation mode without microcontroller
 Low power duty-cycle mode (less than 0.5 mA average
 Standard 10 MHz crystal reference with in circuit calibration
 Alternative OOK support
 Wake-up timer
 Low battery detector
 2.2 to 5.4 V supply voltage
 Low power consumption (~9 mA in low bands)
 Low standby current (0.3 µA)
 Compact 16-pin TSSOP package
 Remote control
 Home security and alarm
 Wireless keyboard/mouse and other PC peripherals
 Toy control
 Remote keyless entry
 Tire pressure monitoring
 Telemetry
 Personal/patient data logging
in analog mode)
supply current)
Remote automatic meter reading
See www.silabs.com/integration for any applicable
errata. See back page for ordering information.
Standalone Mode
This document refers to Si4320-IC Rev J1.
Microcontroller Mode

Related parts for 4320-DKDB2

4320-DKDB2 Summary of contents

Page 1

... Only an external crystal and bypass filtering are needed for operation. The Si4320 has a completely integrated PLL for easy RF design, and its rapid settling time allows for fast frequency hopping, bypassing multipath fading, and interference to achieve robust wireless links. The PLL’s high resolution allows the usage of multiple channels in any of the bands ...

Page 2

... DETAILED DESCRIPTION General The Si4320 FSK receiver is the counterpart of the Si4220 FSK transmitter. It covers the unlicensed frequency bands at 315, 433, 868, and 915 MHz. The device facilitates compliance with FCC and ETSI requirements. The receiver employs the Zero-IF demodulation, allowing the use of a minimal number of external components in a typical application ...

Page 3

... Otherwise, it will go to microcontroller mode and the pin will become an output and provide a clock signal for the microcontroller. To prevent the Si4320 from accidentally entering a standalone mode, the stray capacitance should be kept below pin 8. ...

Page 4

... Clock output for the microcontroller Crystal connection (other terminal of crystal to VSS) / External reference AIO input DO Reset output (active low) S Negative supply voltage AI RF differential signal input AI RF differential signal input S Positive supply voltage AO Analog RSSI output DO Valid Data Indicator output Si4320 4 ...

Page 5

... SDO P1 IA4320 nIRQ nFFS FFIT 8 9 (optional) (optional) SDI 1 16 VDI P4 15 SCK 2 ARSSI nSEL SDO P1 IA4320 5 12 nIRQ P0 nFFS FFIT 8 9 (optional) (optional) Si4320 VCC C2 C1 10n 2.2u C3 Antenna 250 Ohm X1 10MHz VCC C2 C1 10n 2.2u C3 Antenna 250 Ohm X1 10MHz 5 ...

Page 6

... Low power duty cycle mode select input Crystal connection (other terminal of crystal to VSS) or external reference input Frequency select input bit1 Negative supply voltage RF differential signal input RF differential signal input Positive supply voltage Frequency select input bit2 Frequency select input bit3 Si4320 6 ...

Page 7

... OUT3 * # 10MHz * Configuration pins: leave open or connect to VCC or GND # Configuration pin: connect to VCC or GND Band [MHz 315 2.2µF 10nF 390pF 433 2.2µF 10nF 220pF 868 2.2µF 10nF 47pF 915 2.2µF 10nF 33pF Si4320 Antenna 250 Ohm C3 7 ...

Page 8

... Conditions/Notes 315 / 433 MHz bands 868 MHz band 915 MHz band All blocks disabled Crystal oscillator and base band parts are ON Programmable in 0.1 V steps 5 Si4320 Max Units 6 +0 1000 V ºC 125 ºC 260 Max Units 5 ºC Min Typ Max Units ...

Page 9

... Out of band interferers f-f > 4MHz LO LNA: high gain LNA gain (0, -14dB) LNA gain (-6, -20dB) Until the RSS output goes high after the input signal exceeds the preprogrammed limit C =5nF ARRSI Si4320 Min Typ Max Units 310.24 319.75 430.24 439.75 MHz 860.48 879.51 900 ...

Page 10

... With running crystal oscillator Programmable in 0.5 pF steps, tolerance +/- 10% (Note 4) After V has reached 90% of final value dd Crystal ESR < 100 Ohms (Note 5) Crystal oscillator must be enabled to ensure proper calibration at startup (Note pure capacitive load Si4320 Min Typ Max Units MHz 2.5 7.5 kHz 20 µ ...

Page 11

... Select high time SHI t Data setup time (SDI transition to SCK rising edge Data hold time (SCK rising edge to SDI transition Data delay time OD Timing Diagram nSEL SCK SDI BIT 15 BIT 14 nIRQ t OD BIT POR Si4320 Minimum value [ns SHI t SH BIT K-UP nIRQ 11 ...

Page 12

... Related Control Bits b1 to b0, eb, et i0, dc f11 a0, rl1 to rl0, st, fi, oe, en al s0, ff POR 893Ah x1 x0 Crystal Load Capacitance [ 10.0 … 15 16.0 respectively. They are enabled set the crystal is active during sleep Si4320 when the mode. 12 ...

Page 13

... VDI output 0 Digital RSSI Out (DRSSI) 1 Data Quality Detector Output (DQD) 0 Clock recovery lock 1 DRSSI && DQD g0 G (dB relative to max. G) LNA - - RSSI [dBm] setth -103 - - - - - Reserved Reserved Si4320 POR A680h Band [MHz 315 1 31 433 1 43 868 2 43 915 POR C0C1h 13 ...

Page 14

... D.C + *100% 6. Low Battery Detector and Microcontroller Clock Divider Command bit The 5-bit value T of t4-t0 determines the threshold voltage of the threshold voltage 2. 0 Clock divider configuration the detector: lb Clock Output Frequency [MHz Si4320 POR E196h POR CC0Eh POR C200h 14 ...

Page 15

... Auto mode off (Strobe is controlled by microcontroller) Runs only once after each power-up Drop the f value when the VDI signal is low offset Keep the f value independently from the state of the VDI signal offset POR C6F7h f : res 315, 433MHz bands: 2.5kHz 868MHz band: 5kHz 915MHz band: 7.5kHz Si4320 15 ...

Page 16

... At higher deviation/bitrate settings higher threshold parameter can report "good signal quality" as well Filter Type 0 0 OOK to filter 0 1 Digital filter 1 0 Reserved 1 1 Analog RC filter 9.6 kbps 19.2 kbps 38.4 kbps 3.3 nF 1.5 nF 680 pF Si4320 POR C42Ch 57.6 kbps 115.2 kbps 256 kbps 270 pF 150 pF 100 pF 16 ...

Page 17

... VDI (Valid Data Indicator) see further details in Receiver Control Word, Synchron word in microcontroller mode is 2DD4h Clock recovery in fast mode: bit BR is bit rate difference between the transmitter and the receiver. N condition POR C823h  BR/BR<3/(29*N bit is the maximal number of bit POR CE85h Si4320 ) 17 ...

Page 18

... The read command starts with a zero, whereas all other control commands start with a one. Therefore, after receiving the first bit of the control command the Si4320 identifies read command the first bit of the command is received, the receiver starts to clock out the status bits on the SDO output as follows: Status Register Read Sequence with FIFO Read Example It is possible to read out the content of the FIFO after the reading of the status bits ...

Page 19

... FIFO status in this case. nSEL SCK nSDI nFFS* FIFO read out SDO FIFO OUT FO+1 FO+2 FO+3 FFIT NOTE: *nFFS is used to select FIFO During FIFO access the f cannot be higher than f SCK 4 FO+4 /4, where f is the crystal oscillator frequency. ref ref Si4320 19 ...

Page 20

... IN2 OUT1 OUT2 OUT3 7 10 FCS 1 LPDM 8 9 XTL One’s complement Chip Address Function of Function Control Byte Control Byte D4h D2h See below B4h B2h OUT2 OUT1 OUT1 Si4320 Function Control Byte Byte See below See below OUT0 OUT0 ...

Page 21

... Si4320 F receiving Chip Address PIN2=1 Byte PIN3=1 (900.960) D4h 902.880 D2h 904.800 B4h 906.720 B2h 908.640 D4h 910.560 D2h 912.480 B4h 914 ...

Page 22

... In order to get accurate values the AFC has to be disabled during the read by clearing the "en" bit in the AFC Control Command (bit 0). 30.5ms 30.5ms 300ms Active Synchron word (2DD4h) received Start of new cycle Si4320 300ms 22 ...

Page 23

... CRYSTAL SELECTION GUIDELINES The crystal oscillator of the Si4320 requires a 10 MHz parallel mode crystal. The circuit contains an integrated load capacitor in order to minimize the external component count. The internal load capacitance value is programmable from 8 0.5 pF steps. With appropriate PCB layout, the total load capacitance value can variety of crystal types can be used. ...

Page 24

... Si4320 24 ...

Page 25

... Issuing FF00h command will trigger software reset. See the Wake-up Timer Command. Reset ramp line (100mV/ms) Reset ramp line (100mV/ms) ramp start.. Typical example when a switch-mode regulator is used to supply the radio, dd line. Follow the manufacturer’s recommendations how to decrease the ripple of the regulator IC time time Si4320 25 ...

Page 26

... MEASUREMENT RESULTS Receiver Selectivity at Different Baseband Filter Settings 0 -6 -12 -18 -24 -30 -36 -42 -1000 -800 Receiver Selectivity -600 -400 -200 0 200 400 Frequency offset [kHz] Si4320 400 kHz 340 kHz 270 kHz 200 kHz 134 kHz 67 kHz 600 800 1000 26 ...

Page 27

... A group of decoupling capacitors is placed to provide very low supply noise for the measurements. R1-C1 forms a low pass filter to block the CLK signal going down to the test-board on pin 2 of the connector. Layout and Assembly Drawing for the 50 Bottom Layer  Test-Board Top Layer Si4320 27 ...

Page 28

... Measured in compliant with ETSI Standard EN 300 220-1 v2.1.1 (2006-01 Final Draft), section 9 Sensitivity over Ambient Temperature (868 MHz, 9.6 kbps, dfsk: 45 kHz, BW: 67 kHz) -100 -103 -106 -109 -112 -115 -50 - interferer offset from carrier [MHz] 868 MHz Temperature [Celsius] Si4320 433 Mhz 868 MHz 915MHz 3V, dd 2.2 V 2.7 V 3.3 V 4 100 28 ...

Page 29

... Sensitivity over Ambient Temperature (915 MHz, 9.6 kbps, dfsk: 45 kHz, BW: 67 kHz) -100 -103 -106 -109 -112 -115 -50 -25 434 MHz Temperature [Celsius] 915 MHz Temperature [Celsius] Si4320 2.2 V 2.7 V 3.3 V 4.4 V 5.4 V 100 2.2 V 2.7 V 3.3 V 4.4 V 5.4 V 100 29 ...

Page 30

... Input Pow er [dBm] 9.6 kbps 19.2 kbps BW=67 kHz BW=67 kHz f f =30 kHz =45 kHz =45 kHz FSK FSK selection for different data rates. Recommended only when using accurate crystal (20ppm or Si4320 1.1kbps 2.4kbps 4.8kbps 9.6kbps 19.2kbps 38.4kbps 57.6kbps 115kbps -95 1.1kbps 2.4kbps 4.8kbps 9 ...

Page 31

... Sensitivity versus offset at BER=1e Offse t [kHz] f BR=9.6 kbps, BER=10 , BW=67 kHz, -3 FSK Sensitivity versus offset at BER=1e Offset [kHz] , BW=134 kHz, f BR=9.6 kbps, BER=10 -3 FSK no AFC AFC =60 kHz no AFC 50 60 =60 kHz Si4320 31 ...

Page 32

... MHz Matching to 50 Ohm magdB(S11) 220 240 260 280 300 320 340 360 380 freq. [MHz] Input Matching circuit to LNA C1 L1 LNA 250ohm to LNA C1 L1 [nH] C1 [pF] 915 15 3 868 15 3 433 36 7 315 56 9 Si4320 400 32 ...

Page 33

... EXAMPLE APPLICATIONS For Microcontroller Mode Schematic PCB Layout of Wireless Keyboard Demo Receiver (operating in the 915 MHz band) Top Layer Si4320 Bottom Layer 33 ...

Page 34

... Push-Button Demo Receiver (434 MHz) Schematics PCB Layout of Push-Button Receiver Demo Circuit (operating in the 434 MHz band) Top Layer Si4320 Bottom Layer 34 ...

Page 35

... 6.40 BSC. 4,40 4,50 0,169 0,60 0,75 0,020 1.00 REF REF. 12 REF. 0.25 Detail “A” Dimensions in Inches Nom. Max 0,035 0,041 0,009 0,010 0,197 0,201 0.252 BSC. 0,173 0,177 0,024 0,030 0.39 REF REF. 12 REF. Si4320 35 ...

Page 36

... RELATED PRODUCTS AND DOCUMENTS Si4320 Universal ISM Band FSK Receiver DESCRIPTION Si4320 16-pin TSSOP die Demo Boards and Development Kits DESCRIPTION Development Kit Remote Temperature Monitoring Station Related Resources DESCRIPTION Antenna Selection Guide Antenna Development Guide Si4220 Universal ISM Band FSK Transmitter Note: Volume orders must include chip revision to be accepted ...

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