ATA5723-DK Atmel, ATA5723-DK Datasheet - Page 24

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ATA5723-DK

Manufacturer Part Number
ATA5723-DK
Description
BOARD RF RCVR ARRAKIS 315MHZ
Manufacturer
Atmel
Type
Receiver, ASK/FSKr
Datasheet

Specifications of ATA5723-DK

Frequency
315MHz
For Use With/related Products
ATA5723
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
10.2
Figure 10-4. Controlled Noise Suppression
24
Serial bi-directional
Controlled Noise Suppression by the Microcontroller
ATA5723/ATA5724/ATA5728
POLLING/_ON
data line
(DATA_CLK)
Bit-check
mode
Bit check ok
Figure 10-3. Occurrence of a Pulse at the End of the Data Stream
Digital noise appears at the end of a valid data stream if the bit Noise_Disable (see
on page
must be set to low. The receiver remains in receiving mode. The OFF command then causes a
change to start-up mode. The programmed sleep time (see
cuted because the level at pin POLLING/_ON is low; however, the bit check is active in this
case. The OFF command also activates the bit check if the pin POLLING/_ON is held to low.
The receiver changes back to receiving mode if the bit check was successful. To activate the
polling mode at the end of the data transmission, the pin POLLING/_ON must be set to high.
This way of suppressing the noise is recommended if the data stream is not Manchester or
Bi-phase coded.
Data_out (DATA)
Preburst
DATA_CLK
Dem_out
27) in the OPMODE register is set to 0. To suppress the noise, the pin POLLING/_ON
Data
Receiving mode
Digital Noise
'1'
data clock control
Timing error
Receiving mode,
Data stream
logic active
OFF-command
'1'
'1'
Start-up
mode
t
ee
T
< T
ee
Lim_min
Bit-check
mode
Bit check ok
or T
T
pulse
Lim_max
Preburst
< t
ee
Receiving mode
Table 11-7 on page
< t
Data
Bit-check mode
Lim_min_2T
Digital noise
or t
Digital Noise
ee
> T
Lim_max_2T
27) is not exe-
9106E–RKE–07/08
Sleep
mode
Table 11-9

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