MPC8377EWLANB Freescale Semiconductor, MPC8377EWLANB Datasheet - Page 50
MPC8377EWLANB
Manufacturer Part Number
MPC8377EWLANB
Description
ACCESS POINT/ROUTER MPC8377
Manufacturer
Freescale Semiconductor
Datasheet
1.MPC8377EVRAGD.pdf
(126 pages)
Specifications of MPC8377EWLANB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Enhanced Secure Digital Host Controller (eSDHC)
11.3.1
Figure 30
11.3.1.1
The following equations show how to calculate the allowed skew range between the SD_CLK and
SD_DAT/CMD signals on the PCB.
Zero clock delay:
With clock delay:
This means that data delay should be equal or less than the clock delay in the ideal case where
t
50
SHSCLKL
t
t
DATA_DELAY
DATA_DELAY
= 10 ns:
provides the data and command output timing diagram.
High-Speed Output Path (Write)
MPC8377E Pins
Output from the
High-Speed Write Meeting Setup (Maximum Delay)
MPC8377E Pin
SD CLK at the
SD Card Pins
the Card Pin
Input at the
SD CLK at
MPC8377E PowerQUICC II Pro Processor Hardware Specifications, Rev. 4
–
–
t
t
t
t
CLK_DELAY
CLK_DELAY
SHSKHOV
Output Valid Time: t
Output Hold Time: t
DATA_DELAY
t
SHSKHOV
+ t
DATA_DELAY
Figure 30. High Speed Output Path
–
< 10
< 0
t
CLK_DELAY
+ t
t
SHSCK
SHSKHOV
SHSKHOX
–
Driving
DATA_DELAY
6
Edge
t
DATA_DELAY
–
4
(Clock Cycle)
+ t
< t
ISU
SHSCKL
< t
+ t
SHSCKL
ISU
–
t
t
< t
CLK_DELAY
ISU
t
ISU
SHSCKL
t
(6 ns)
+ t
SHSCKL
–
CLK_DELAY
t
SHSKHOV
Sampling
Edge
t
IH
(2 ns)
Freescale Semiconductor
Eqn. 10
Eqn. 11
Eqn. 12
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