AD6655BCPZ-105 Analog Devices Inc, AD6655BCPZ-105 Datasheet - Page 14
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AD6655BCPZ-105
Manufacturer Part Number
AD6655BCPZ-105
Description
IC IF RCVR 14BIT 105MSPS 64LFCSP
Manufacturer
Analog Devices Inc
Datasheet
1.AD6655-125EBZ.pdf
(88 pages)
Specifications of AD6655BCPZ-105
Function
IF Diversity Receiver
Frequency
450MHz
Rf Type
Cellular, CDMA2000, GSM EDGE, W-CDMA
Secondary Attributes
32-Bit Numerically Controlled Oscillator
Package / Case
64-VFQFN, CSP Exposed Pad
Receiving Current
575mA
Frequency Range
450MHz
Rf Ic Case Style
LFCSP
No. Of Pins
64
Supply Voltage Range
1.7V To 1.9V
Operating Temperature Range
-40°C To +85°C
Frequency Max
650MHz
Data Rate Max
105Mbps
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AD6655-150EBZ - BOARD EVAL FOR 150MSPS AD6655AD6655-125EBZ - BOARD EVAL W/AD6655 & SOFTWARE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
AD6655
SWITCHING SPECIFICATIONS—AD6655BCPZ-125/AD6655BCPZ-150
Table 8.
Parameter
CLOCK INPUT PARAMETERS
DATA OUTPUT PARAMETERS (DATA, FD)
OUT-OF-RANGE RECOVERY TIME
1
2
3
Conversion rate is the clock rate after the divider.
Output propagation delay is measured from CLK 50% transition to DATA 50% transition, with a 5 pF load.
Wake-up time is dependent on the value of the decoupling capacitors.
Input Clock Rate
Conversion Rate
CLK Period—Divide-by-1 Mode (t
CLK Pulse Width High (t
CMOS Noninterleaved Mode—DRVDD = 1.8 V
CMOS Noninterleaved Mode—DRVDD = 3.3 V
CMOS Interleaved and IQ Mode—DRVDD = 1.8 V
CMOS Interleaved and IQ Mode—DRVDD = 3.3 V
LVDS Mode—DRVDD = 1.8 V
Pipeline Delay (Latency) NCO, FIR, f
Pipeline Delay (Latency) NCO Enabled; FIR and f
Pipeline Delay (Latency) NCO, FIR, and f
Aperture Delay (t
Aperture Uncertainty (Jitter, t
Wake-Up Time
DCS Enabled
DCS Disabled
Divide-by-1 Mode, DCS Enabled
Divide-by-1 Mode, DCS Disabled
Divide-by-2 Mode, DCS Enabled
Divide-by-3 Through Divide-by-8 Modes, DCS Enabled
Data Propagation Delay (t
DCO Propagation Delay (t
Setup Time (t
Hold Time (t
Data Propagation Delay (t
DCO Propagation Delay (t
Setup Time (t
Hold Time (t
Data Propagation Delay (t
DCO Propagation Delay (t
Setup Time (t
Hold Time (t
Data Propagation Delay (t
DCO Propagation Delay (t
Setup Time (t
Hold Time (t
Data Propagation Delay (t
DCO Propagation Delay (t
(Complex Output Mode)
H
H
H
H
3
)
)
)
)
S
S
S
S
1
)
)
)
)
A
)
CLKH
)
DCO
DCO
DCO
DCO
DCO
PD
PD
PD
PD
PD
J
)
)
)
)
)
)
2
2
2
2
2
)
)
)
)
)
CLK
S
/8 Mix Disabled
)
S
/8 Mix Enabled
S
/8 Mix Disabled
Rev. A | Page 14 of 88
Temp
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
20
10
8
2.4
3.6
1.6
0.8
1.6
4.0
1.9
4.4
1.6
3.4
1.9
3.8
2.5
3.7
Min
AD6655BCPZ-125
3.9
4.1
3.9
4.1
4.8
38
38
350
3
4
4
5.4
9.5
6.5
5.8
9.7
6.3
4.8
4.9
3.1
5.2
5.1
2.9
5.3
109
1.0
0.1
Typ
625
125
125
5.6
4.4
6.2
7.3
6.4
7.7
6.2
6.7
6.4
7.1
7.0
7.3
Max
20
10
6.66
2.0
3.0
1.6
0.8
1.6
4.0
1.9
4.4
1.6
3.4
1.9
3.8
2.5
3.7
Min
AD6655BCPZ-150
3.33
3.33
3.9
5.4
8.16
5.16
4.1
5.8
8.36
4.96
3.9
4.8
4.23
2.43
4.1
5.2
4.43
2.23
4.8
5.3
38
38
109
1.0
0.1
350
3
Typ
625
150
150
4.66
3.66
6.2
7.3
6.4
7.7
6.2
6.7
6.4
7.1
7.0
7.3
Max
Unit
MHz
MSPS
MSPS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Cycles
Cycles
Cycles
ns
ps rms
us
Cycles