SI4705-C40-GMR Silicon Laboratories Inc, SI4705-C40-GMR Datasheet

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... Programmable reference clock  Volume control  Adjustable soft mute control  RDS/RBDS processor (Si4705)  Optional digital audio out (Si4705)  2-wire and 3-wire control interface  Integrated LDO regulator  Signal quality measurements  2.7 to 5.5 V supply voltage  ...

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Si4704/05-C40 2 Rev. 1.0 ...

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... FM Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 4.4. Digital Audio Interface (Si4705 Only 4.5. Stereo Audio Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.6. De-emphasis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.7. Stereo DAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 4.8. Soft Mute . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.9. RDS/RBDS Processor (Si4705 Only 4.10. Tuning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.11. Seek . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.12. Reference Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.13. Control Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.14. GPO Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 4.15. Reset, Powerup, and Powerdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 4 ...

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Si4704/05-C40 1. Electrical Specifications Table 1. Recommended Operating Conditions Parameter Supply Voltage Interface Supply Voltage Digital Power Supply Powerup Rise Time Interface Power Supply Powerup Rise Time Ambient Temperature Note: All minimum and maximum specifications are guaranteed and apply across ...

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Table 3. DC Characteristics (V = 2 1. Parameter FM Receiver to Line Output 1 Supply Current 2 Supply Current 1 RDS Supply Current Supplies and Interface Interface Supply ...

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Si4704/05-C40 Table 4. Reset Timing Characteristics (V = 2 1. Parameter RST Pulse Width and GPO1, GPO2/INT Setup to RST GPO1, GPO2/INT Hold from RST Important Notes: 1. When ...

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Table 5. 2-Wire Control Interface Characteristics (V = 2 1. Parameter SCLK Frequency SCLK Low Time SCLK High Time  SCLK Input to SDIO Setup (START)  SCLK Input ...

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Si4704/05-C40 SU:STA HD:STA LOW 70% SCLK 30% 70% SDIO 30% START t r:IN Figure 2. 2-Wire Control Interface Read and Write Timing Parameters SCLK A6-A0, SDIO R/W START ADDRESS + R/W Figure 3. 2-Wire Control Interface Read ...

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Table 6. 3-Wire Control Interface Characteristics (V = 2 1. Parameter SCLK Frequency SCLK High Time SCLK Low Time SDIO Input, SEN to SCLK Setup SDIO Input to SCLK ...

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Si4704/05-C40 Table 7. SPI Control Interface Characteristics (V = 2 1. Parameter SCLK Frequency SCLK High Time SCLK Low Time SDIO Input, SEN to SCLKSetup SDIO Input to SCLKHold ...

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Table 8. Digital Audio Interface Characteristics (V = 2 1. Parameter DCLK Cycle Time DCLK Pulse Width High DCLK Pulse Width Low DFS Set-up Time to DCLK Rising Edge ...

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Si4704/05-C40 Table 9. FM Receiver Characteristics (V = 2 1. Parameter Input Frequency Sensitivity with Headphone 3,4,5 Network Sensitivity with 50  Network 3,4,5,6 6 RDS Sensitivity 6 LPI ...

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Table 9. FM Receiver Characteristics (V = 2 1. Parameter 3,6,12,13 Intermod Sensitivity 3,7,9 Audio THD 6 De-emphasis Time Constant 6,10 Audio Output Load Resistance 6,10 Audio Output Load ...

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Si4704/05-C40 Table 10. 64–75.9 MHz Input Frequency FM Receiver Characteristics (V = 2 1. Parameter Input Frequency Sensitivity with Headphone 3,4,5 Network 7 LNA Input Resistance 7 LNA Input ...

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Table 11. Reference Clock and Crystal Characteristics (V = 2 1. Parameter 1 RCLK Supported Frequencies 2 RCLK Frequency Tolerance REFCLK_PRESCALE REFCLK Crystal Oscillator Frequency 2 Crystal Frequency Tolerance ...

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Si4704/05-C40 2. Typical Application Schematic FMI FMI 3 RFGND 4 LPI LPI 5 RST RST SEN SCLK SDIO RCLK VIO 1.85 to 3.6 V Notes: 1. Place C1 close to V pin All grounds connect ...

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Bill of Materials Component(s) C1 Supply bypass capacitor, 22 nF, ±20%, Z5U/X7R U1 Si4704/05 FM Radio Receiver C2, C3 Crystal load capacitors, 22 pF, ±5%, COG (Optional: for crystal oscillator option) X1 32.768 kHz crystal (Optional: for crystal oscillator ...

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... PCB trace or wire antenna input, and a that may be integrated into the system enclosure. There is a clocking mode to choose to clock the Si4704/05 from a reference clock or crystal. On the Si4705, there is an audio output mode to choose between an analog and/or digital audio output. Rev. 1.0 Si4704/05 DAC ...

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... This advanced architecture allows the Si4704/05 to perform channel selection, FM demodulation, and stereo audio processing to achieve superior performance compared to traditional analog architectures. 4.4. Digital Audio Interface (Si4705 Only) The digital audio interface operates in slave mode and a digital bit supports three different audio data formats: 2  ...

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Si4704/05-C40 INVERTED (OFALL = 1) DCLK (OFALL = 0) DCLK DFS (OMODE = 0000) 1 DCLK DOUT 1 2 MSB INVERTED (OFALL = 1) DCLK (OFALL = 0) DCLK DFS Left-Justified (OMODE = 0110) DOUT 1 2 ...

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... The Si4705 implements an RDS/RBDS* processor for symbol decoding, detection, and error correction. The Si4705 device is user configurable and provides an optional interrupt when RDS is synchronized, loses synchronization, and/or the user configurable RDS FIFO threshold has been met. The Si4705 reports RDS decoder synchronization status and detailed bit errors in the information word for each RDS block with the FM_RDS_STATUS command ...

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Si4704/05-C40 4.10. Tuning The tuning frequency can be directly programmed using the FM_TUNE_FREQ command. supports channel spacing steps of 10 kHz in FM mode. 4.11. Seek Seek tuning will search up or down for a valid channel. Valid channels are ...

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Although the Si4704/05 will respond to only a single device address, this address can be changed with the SEN pin (note that the SEN pin is not used for signaling in 2-wire mode). When SEN = 0, the 7-bit device ...

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Si4704/05-C40 Keep SEN low until all bytes have transferred. A transaction may be aborted at any time by setting SEN high and toggling SCLK high and then low. Commands will be ignored by the device if the transaction is aborted. ...

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... Begins searching for a valid frequency. Queries the status of previous FM_TUNE_FREQ or FM_SEEK_START command. Queries the status of the Received Signal Quality (RSQ) of the current channel (Si4705 only). Returns RDS information for current channel and reads an entry from the RDS FIFO (Si4705 only). Rev. 1.0 Si4704/05-C40 25 ...

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Si4704/05-C40 Table 14. Selected Si4704/05 Properties Prop Name 0x1100 FM_DEEMPHASIS FM_BLEND_STEREO_ 0x1105 THRESHOLD FM_BLEND_MONO_ 0x1106 THRESHOLD FM_RSQ_INT_ 0x1200 SOURCE FM_SOFT_MUTE_ 0x1302 MAX_ATTENUATION FM_SEEK_BAND_ 0x1400 BOTTOM 0x1401 FM_SEEK_BAND_TOP FM_SEEK_FREQ_ 0x1402 SPACING FM_SEEK_TUNE_ 0x1403 SNR_THRESHOLD FM_SEEK_TUNE_ 0x1404 RSSI_TRESHOLD 0x1500 RDS_INT_SOURCE 0x1501 RDS_INT_FIFO_COUNT ...

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Pin Descriptions: Si4704/05-GM RFGND Pin Number(s) Name FMI 3 RFGND 4 LPI 5 RST 6 SEN 7 SCLK 8 SDIO 9 RCLK 12, GND PAD GND 13 ROUT 14 ...

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... Si4704/05-C40 7. Ordering Guide Part Number* Si4704-C40-GM FM Broadcast Radio Receiver Si4705-C40-GM FM Broadcast Radio Receiver with RDS/RBDS *Note: Add an “(R)” at the end of the device part number to denote tape and reel option; 2500 quantity per reel. 28 Description Rev. 1.0 Package Operating Type Temperature QFN – ...

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... WW = Workweek 0440 CTTT YWW Figure 14. Si4704 Top Mark 0540 CTTT YWW Figure 15. Si4705 Top Mark 04 = Si4704 05 = Si4705 40 = Firmware Revision 4 Revision C Die. Internal tracking code. Pin 1 Identifier. Assigned by the Assembly House. Corresponds to the last significant digit of the year and workweek of the mold date. ...

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Si4704/05-C40 9. Package Outline: Si4704/05-GM Figure 16 illustrates the package details for the Si4704/05. Table 15 lists the values for the dimensions shown in the illustration. Figure 16. 20-Pin Quad Flat No-Lead (QFN) Symbol Millimeters Min Nom A 0.50 0.55 ...

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PCB Land Pattern: Si4704/05-C40-GM Figure 17 illustrates the PCB land pattern details for the Si4704/05-GM. Table 16 lists the values for the dimensions shown in the illustration. Figure 17. PCB Land Pattern Rev. 1.0 Si4704/05-C40 31 ...

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Si4704/05-C40 Table 16. PCB Land Pattern Dimensions Symbol Millimeters Min 2.10 Notes: General 1. All dimensions shown are in millimeters (mm) unless otherwise noted. 2. Dimensioning and Tolerancing is per the ...

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Additional Reference Resources Contact your local sales representatives for more information or to obtain copies of the following references:  EN55020 Compliance Test Certificate  AN332: Si47xx Programming Guide  AN383: Si47xx Antenna, Schematic, Layout, and Design Guidelines  ...

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Si4704/05-C40 OCUMENT HANGE IST Revision 0.7 to Revision 0.71  V minimum changed from 1 1. Revision 0.71 to Revision 1.0  Updated patent information on page 1.  Updated Table 3 on ...

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N : OTES Si4704/05-C40 Rev. 1.0 35 ...

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