ATR2732N1-PBPW Atmel, ATR2732N1-PBPW Datasheet - Page 7

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ATR2732N1-PBPW

Manufacturer Part Number
ATR2732N1-PBPW
Description
IC DAB ONE-CHIP FRONT-END 64-QFN
Manufacturer
Atmel
Datasheet

Specifications of ATR2732N1-PBPW

Frequency
24.576MHz
Sensitivity
-98dBm
Applications
Broadcast, Consoles, Receivers
Current - Receiving
80mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Features
SPI digital interface
Voltage - Supply
3 V ~ 3.5 V
Operating Temperature
-40°C ~ 90°C
Package / Case
64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Data Rate - Maximum
-
Modulation Or Protocol
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATR2732N1-PBPW
Manufacturer:
ATMEL
Quantity:
2 565
3.3
3.4
3.5
3.6
3.7
3.8
9130AS–DAB–04/08
Device Support Functions
Tuning Support Functions
DAC Usage
RSSI Measurement
Clocking Engine in General
PLL Part
The ATR2732N1 has incorporated some very useful additional functions for handling the device
and optimizing the performance. First of all, a very precise clocking engine is incorporated. To
optimize the performance of this front end, a tuning support for alignment of the filters is featured
by this part too, similar to Atmel’s other radio front ends.
The ATR2732N1 includes three operational amplifiers, and three programmable digital-analog
converters (DACs). These outputs are used for automatic filter alignment of the tunable VHF
antenna filter and the preselection filter. DACs are incorporated in the ATR2732N1 for this tun-
ing-support function.
For more details about the usage of the filter-tuning function contact your local Atmel sales office
and ask for the application note covering this feature.
There are two DAC modes: pure DAC and Loop/Offset mode. In the pure DAC mode the DAC
sets a definite value. In the Loop/Offset mode the filter tuning voltage is derived from a reference
tank circuit (inductor plus varicap). An offset value can be added to this voltage. This Loop/Off-
set mode is the most useful mode and recommended for most applications. Temperature
compensation is also included in this mode.
The ATR2732N1 offers the option of getting information about the field strength. This is not an
absolute real-field-strength value, but an indication of in which range the field strength is avail-
able. This information can be obtained from the 8 low bits of the status register.
The ATR2732N1 incorporates a convenient and flexible clocking engine. This includes VCOs
and PLLs for both bands, as well as a reference oscillator which can be precisely tuned using
the SPI interface. Together, this results in low external component count, but offers high flexibil-
ity and convenience.
The two PLL parts, the L-band PLL and the Band III PLL, perform phase lock of the LO signal to
an on-chip crystal reference oscillator. The Band III PLL incorporates a fractional part. This tech-
nique allows operation with an increased bandwidth of the PLL, which results in improved phase
noise.
ATR2732N1
7

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