SI4421-A0-FT Silicon Laboratories Inc, SI4421-A0-FT Datasheet - Page 27

• Manufacturer Part Number: SI4421-A0-FT
• Description: IC TXRX FSK 915MHZ 3.8V 16-TSSOP
• Manufacturer: Silicon Laboratories Inc

Specifications of SI4421-A0-FT

• Frequency: 433MHz, 868MHz, 915MHz
• Data Rate - Maximum: 256kbps
• Modulation Or Protocol: FSK
• Applications: ISM
• Power - Output: 7dbm
• Sensitivity: -110dBm
• Voltage - Supply: 2.2 V ~ 3.8 V
• Current - Receiving: 15mA
• Current - Transmitting: 28mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1737-5

17. Status Read Command
The read command starts with a zero, whereas all other control commands start with a one. If a read command is identified, the
status bits will be clocked out on the SDO pin as follows:
Status Register Read Sequence with FIFO Read Example:
Note: In order to get accurate values the AFC has to be disabled during the read by clearing the en bit in the AFC Control Command
Bit
OFFS(3) -OFFS(0)
(page 21). The AFC offset value (OFFS bits in the status word) is represented as a two’s complement number. The actual
frequency offset can be calculated as the AFC offset value multiplied by the current PLL frequency step (see the Frequency
Setting Command on page 17).
Bit Name
OFFS(6)
15
WKUP
RGUR
FFOV
FFEM
0
ATGL
RGIT
RSSI
DQD
FFIT
POR
EXT
LBD
ATS
CRL
14
0
13
0
TX register is ready to receive the next byte (Can be cleared by Transmitter Register Write Command, page 24)
The number of data bits in the RX FIFO has reached the pre-programmed limit (Can be cleared by any of the
FIFO read methods)
Power-on reset (Cleared after Status Read Command)
TX register under run, register over write (Cleared after Status Read Command)
RX FIFO overflow (Cleared after Status Read Command)
Wake-up timer overflow (Cleared after Status Read Command)
Logic level on interrupt pin (pin 16) changed to low (Cleared after Status Read Command)
Low battery detect, the power supply voltage is below the pre-programmed limit
FIFO is empty
Antenna tuning circuit detected strong enough RF signal
The strength of the incoming signal is above the pre-programmed limit
Data quality detector output
Clock recovery locked
Toggling in each AFC cycle
MSB of the measured frequency offset (sign of the offset value)
Offset value to be added to the value of the frequency control parameter (Four LSB bits)
12
0
11
0
10
0
9
0
8
0
7
0
6
0
5
0
Function
4
0
3
0
2
0
1
0
0
0
0000h
POR
Si4421
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