SI4431-B1-FMR Silicon Laboratories Inc, SI4431-B1-FMR Datasheet
SI4431-B1-FMR
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SI4431-B1-FMR Summary of contents
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... Si4430/31/32 ISM T Features Frequency Range 240–930 MHz (Si4431/32) 900–960 MHz (Si4430) Sensitivity = –121 dBm Output power range +20 dBm Max (Si4432) +13 dBm Max (Si4430/31) Low Power Consumption 18.5 mA receive ...
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Si4430/31/32-B1 Functional Block Diagram 2 Rev 1.1 ...
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T C ABLE O F ONTENTS Section 1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Si4430/31/32-B1 8.2. Microcontroller Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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IGURES Figure 1. Si4430/31 RX/TX Direct-Tie Application Example ..................................................... 16 Figure 2. Si4432 Antenna Diversity Application Example ......................................................... 16 Figure 3. SPI Timing.................................................................................................................. 18 Figure 4. SPI Timing—READ Mode ..........................................................................................19 Figure 5. SPI Timing—Burst ...
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ABLES 1 Table 1. DC Characteristics ......................................................................................................7 Table 2. Synthesizer AC Electrical Characteristics Table 3. Receiver AC Electrical Characteristics Table 4. Transmitter AC Electrical Characteristics Table 5. Auxiliary Block Specifications Table 6. Digital IO ...
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Electrical Specifications 1 Table 1. DC Characteristics Parameter Symbol Supply Voltage Range V DD Power Saving Modes I Shutdown I Low Power Digital Regulator ON (Register values retained) Standby I Sleep (Register values retained) and Main Digital Regulator OFF ...
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... Si4430/31/32-B1 Table 2. Synthesizer AC Electrical Characteristics Parameter Symbol Synthesizer Frequency F SYN Range—Si4431/32 Synthesizer Frequency F SYN Range—Si4430 Synthesizer Frequency F RES-LB 2 Resolution F RES-HB Reference Frequency f REF_LV 2 Input Level 2 Synthesizer Settling Time t LOCK 2 F Residual FM RMS 2 Phase Noise L(f M Notes: 1. All specification guaranteed by production test unless otherwise noted. Production test conditions and max limits are listed in the " ...
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... Table 3. Receiver AC Electrical Characteristics Parameter Symbol RX Frequency F RX Range—Si4431/32 RX Frequency F RX Range—Si4430 2 RX Sensitivity P RX_2 P RX_40 P RX_100 P RX_125 P RX_OOK 3 RX Channel Bandwidth BW BER Variation vs Power P RX_RES 3 Level 3 LNA Input Impedance R IN-RX (Unmatched—measured differentially across RX input pins) RSSI Resolution ...
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... Si4430/31/32-B1 Table 4. Transmitter AC Electrical Characteristics Parameter Symbol TX Frequency F TX Range—Si4431/32 TX Frequency F TX Range—Si4430 2 FSK Data Rate DR FSK 2 OOK Data Rate DR OOK Modulation Deviation Δf1 Δf2 Modulation Deviation Δf RES 2 Resolution Output Power Range—Si4432 Output Power Range—Si4430/31 2 P ...
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Table 5. Auxiliary Block Specifications Parameter Symbol Temperature Sensor TS 2 Accuracy Temperature Sensor TS 2 Sensitivity Low Battery Detector LBD 2 Resolution Low Battery Detector LBD 2 Conversion Time Microcontroller Clock F MC Output Frequency General Purpose ADC ADC ...
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Si4430/31/32-B1 Table 6. Digital IO Specifications (SDO, SDI, SCLK, nSEL, and nIRQ) Parameter Symbol Rise Time T Fall Time T Input Capacitance Logic High Level Input Voltage Logic Low Level Input Voltage Input Current Logic High Level Output Voltage Logic ...
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Table 8. Absolute Maximum Ratings V to GND DD Instantaneous V to GND on TX Output Pin RF-peak Sustained V to GND on TX Output Pin RF-peak Voltage on Digital Control Inputs Voltage on Analog Inputs RX Input Power Operating ...
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Si4430/31/32-B1 1.1. Definition of Test Conditions Production Test Conditions +25 °C +3.3 VDC DD Sensitivity measured at 919 MHz TX output power measured at 915 MHz External reference signal (XOUT) = ...
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Functional Description The Si4430/31/32 are ISM wireless transceivers with continuous frequency tuning over their specified bands which encompasses from 240–960 MHz. The wide operating voltage range of 1.8–3.6 V and low current consumption makes the Si4430/31/32 an ideal solution ...
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Si4430/31/32-B1 supply voltage C6 C7 100p 100n Figure 1. Si4430/31 RX/TX Direct-Tie Application Example Supply Voltage C6 100 p TR & ANT-DIV L3 Switch Figure 2. Si4432 ...
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Operating Modes The Si4430/31/32 provides several operating modes which can be used to optimize the power consumption for a given application. Depending upon the system communication protocol, an optimal trade-off between the radio wake time and power consumption can ...
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Si4430/31/32-B1 3. Controller Interface 3.1. Serial Peripheral Interface (SPI) The Si4430/31/32 communicates with the host MCU over a standard 3-wire SPI interface: SCLK, SDI, and nSEL. The host MCU can read data from the device on the SDO output pin. ...
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First Bit RW SDI SCLK SDO nSEL The SPI interface contains a burst read/write mode which allows for reading/writing sequential registers without having to re-send the SPI address. When the nSEL bit is held low while continuing ...
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Si4430/31/32-B1 3.2. Operating Mode Control There are four primary states in the Si4430/31/32 radio state machine: SHUTDOWN, IDLE, TX, and RX (see Figure 7). The SHUTDOWN state completely shuts down the radio to minimize current consumption. There are five different ...
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SHUTDOWN State The SHUTDOWN state is the lowest current consumption state of the device with nominally less than current consumption. The shutdown state may be entered by driving the SDN pin (Pin 20) high. The SDN ...
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Si4430/31/32-B1 3.2.3. TX State The TX state may be entered from any of the IDLE modes when the txon bit is set "Register 07h. Operating Mode and Function Control 1". A built-in sequencer takes care of all ...
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Interrupts The Si4430/31/32 is capable of generating an interrupt signal when certain events occur. The chip notifies the microcontroller that an interrupt event has occurred by setting the nIRQ output pin LOW = 0. This interrupt signal will be ...
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Si4430/31/32-B1 3.4. System Timing The system timing for TX and RX modes is shown in Figures 8 and 9. The figures demonstrate transitioning from STANDBY mode mode through the built-in sequencer of required steps. The user ...
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... Frequency Programming In order to receive or transmit an RF signal, the desired channel frequency, f Si4430/31/32. The Si4431/32 and Si4430 cover different frequencies. This section discusses the frequency range covered by all EZRadioPRO devices. Note that this frequency is the center frequency of the desired channel and not an LO frequency ...
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Si4430/31/32-B1 fb[4:0] Value The chip will automatically shift the frequency of the Synthesizer down by 937.5 ...
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Easy Frequency Programming for FHSS While Registers 73h–77h may be used to program the carrier frequency of the Si4430/31/32 often easier to think in terms of “channels” or “channel numbers” rather than an absolute frequency value in ...
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Si4430/31/32-B1 The previous equation should be used to calculate the desired frequency deviation. If desired, frequency modulation may also be disabled in order to obtain an unmodulated carrier signal at the channel center frequency; see "4.1. Modulation Type" on page ...
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Frequency Offset Adjustment When the AFC is disabled the frequency offset can be adjusted manually by fo[9:0] in registers 73h and 74h not possible to have both AFC and offset as internally they share the same register. ...
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Si4430/31/32-B1 When AFC is enabled, the preamble length needs to be long enough to settle the AFC. In general, one byte of preamble is sufficient to settle the AFC. Disabling the AFC allows the preamble to be shortened from 40 ...
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TX Data Rate Generator The data rate is configurable between 0.123–256 kbps. For data rates below 30 kbps the ”txdtrtscale” bit in register 70h should be set to 1. When higher data rates are used this bit should be ...
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Si4430/31/32-B1 4. Modulation Options 4.1. Modulation Type The Si4430/31/32 supports three different modulation options: Gaussian Frequency Shift Keying (GFSK), Frequency Shift Keying (FSK), and On-Off Keying (OOK). GFSK is the recommended modulation type as it provides the best performance and ...
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Modulation Data Source The Si4430/31/32 may be configured to obtain its modulation data from one of three different sources: FIFO mode, Direct Mode, and from a PN9 mode. In Direct Mode, the TX modulation data may be obtained from ...
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Si4430/31/32-B1 4.2.2. Direct Mode For legacy systems that perform packet handling within an MCU or other baseband chip, it may not be desirable to use the FIFO. For this scenario, a Direct Mode is provided which bypasses the FIFOs entirely. ...
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Only FSK and OOK modulation types are valid in TX Direct Asynchronous Mode; GFSK modulation is not available in asynchronous mode. This is because the RFIC does not have knowledge of the supplied data rate, and thus cannot determine the ...
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Si4430/31/32-B1 be modulated and transmitted mode it will be the received demodulated data. Figure 15 demonstrates using SDI and SDO as the TX/RX data and clock: nSEL SPI input don’t care SDI SPI output don’t care SDO Figure ...
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... PGA so the receiver can handle signal levels from sensitivity to +5 dBm with optimal performance. In the Si4431, the TX and RX may be tied directly. See the TX/RX direct-tie reference design available on the for more details. When the direct tie is used, the lna_sw bit in “Register 6Dh. TX Power” must Silicon Labs website ...
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... An integrated Sigma Delta (ΣΔ) Fractional-N PLL synthesizer capable of operating from 240–960 MHz is provided on-chip. The Si4431/32 and Si4430 cover different frequencies. This section discusses the frequency range covered by all EZRadioPRO devices. Using a ΣΔ synthesizer has many advantages; it provides flexibility in choosing data rate, deviation, channel frequency, and channel spacing ...
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... The PA output is ramped up and down to prevent unwanted spectral splatter. In the Si4431, the TX and RX may be tied directly. See the TX/RX direct-tie reference design available on the for more details. When the direct tie is used, the lna_sw bit in “Register 6Dh. TX Power” must be Silicon Labs website set to 1 ...
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Si4430/31/32-B1 5.8. Crystal Oscillator The Si4430/31/32 includes an integrated 30 MHz crystal oscillator with a fast start-up time of less than 600 µs when a suitable parallel resonant crystal is used. The design is differential with the required crystal load ...
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Data Handling and Packet Handler The internal modem is designed to operate with a packet including a 010101... preamble structure. To configure the modem to operate with packet formats without a preamble or other legacy packet structures contact customer ...
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Si4430/31/32-B1 Add R/W Function/ D7 Description 08 R/W Operating & antdiv[2] Function Control 2 7C R/W TX FIFO Reserved Reserved txafthr[5] Control 1 7D R/W TX FIFO Reserved Reserved txaethr[5] txaethr[4] txaethr[3] txaethr[2] txaethr[1] txaethr[0] Control 2 The RX FIFO ...
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Packet Handler TX Mode If the TX packet length is set the packet handler will send the number of bytes in the packet length field before returning to IDLE mode and asserting the packet sent interrupt. To resume sending ...
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Si4430/31/32-B1 Initial state FIFO Addr. RX FIFO Addr. Write Pointer L Data 63 63 Figure 22. Multiple Packets in RX with CRC or Header Error ERROR RX ...
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Add R/W Function/Description D7 30 R/W Data Access Control enpacrx 31 R EzMAC status 0 32 R/W Header Control 1 33 R/W Header Control 2 skipsyn 34 R/W Preamble Length prealen[7] 35 R/W Preamble Detection Control preath[4] 36 R/W Sync ...
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Si4430/31/32-B1 6.5. Data Whitening, Manchester Encoding, and CRC Data whitening can be used to avoid extended sequences the transmitted data stream to achieve a more uniform spectrum. When enabled, the payload data bits are XORed ...
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Preamble Length The preamble detection threshold determines the number of valid preamble bits the radio must receive to qualify a valid preamble. The preamble threshold should be adjusted depending on the nature of the application. The required preamble length ...
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Si4430/31/32-B1 period of time sync is not recognized in this period, a timeout will occur, and the search for preamble will be re- initiated. The timeout period after preamble detections is defined as the value programmed into the ...
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RX Modem Configuration A Microsoft Excel parameter calculator or Wireless Development Suite (WDS) calculator is provided to determine the proper settings for the modem. The calculator can be found on www.silabs.com or on the CD provided with the demo ...
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Si4430/31/32-B1 8. Auxiliary Functions 8.1. Smart Reset The Si4430/31/32 contains an enhanced integrated SMART RESET or POR circuit. The POR circuit contains both a classic level threshold reset as well as a slope detector POR. This reset circuit was designed ...
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Microcontroller Clock The 30 MHz crystal oscillator frequency is divided down internally and may be output to the microcontroller through GPIO2. This feature is useful to lower BOM cost by using only one crystal in the system. The system ...
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Si4430/31/32-B1 8.3. General Purpose ADC An 8-bit SAR ADC is integrated for general purpose use, as well as for digitizing the on-chip temperature sensor reading. Registers 0Fh "ADC Configuration", 10h "Sensor Offset" and 4Fh "Amplifier Offset" can be used to ...
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Temperature Sensor An integrated on-chip analog temperature sensor is available. The temperature sensor will be automatically enabled when the temperature sensor is selected as the input of the ADC or when the analog temp voltage is selected on the ...
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Si4430/31/32-B1 Temperature Measurement with ADC8 300 250 200 150 100 50 0 -40 -20 Figure 28. Temperature Ranges using ADC8 Temperature [Celsius] Rev 1.1 Sensor Range 0 Sensor Range 1 Sensor Range 2 Sensor ...
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Low Battery Detector A low battery detector (LBD) with digital read-out is integrated into the chip. A digital threshold may be programmed into the lbdt[4:0] field in "Register 1Ah. Low Battery Detector Threshold." When the digitized battery voltage reaches ...
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Si4430/31/32-B1 8.6. Wake-Up Timer and 32 kHz Clock Source The chip contains an integrated wake-up timer which can be used to periodically wake the chip from SLEEP mode. The wake-up timer runs from the internal 32.768 kHz RC Oscillator. The ...
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WUT Period GPIOX =00001 nIRQ SPI Interrupt Read Chip State Sleep Ready 1.5 mA Current Consumption WUT Period GPIOX =00001 nIRQ SPI Interrupt Read Chip State Current Consumption Figure 29. WUT Interrupt and WUT Operation Interrupt Enable enwut =1 ( ...
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Si4430/31/32-B1 8.7. Low Duty Cycle Mode The Low Duty Cycle Mode is available to automatically wake-up the receiver to check if a valid signal is available. The basic operation of the low duty cycle mode is demonstrated in the figure ...
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GPIO Configuration Three general purpose IOs (GPIOs) are available. Numerous functions such as specific interrupts, TRSW control, Microcontroller Output, etc. can be routed to the GPIO pins as shown in the tables below. When in Shutdown mode all the ...
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Si4430/31/32-B1 8.9. Antenna Diversity To mitigate the problem of frequency-selective fading due to multi-path propagation, some transceiver systems use a scheme known as antenna diversity. In this scheme, two antennas are used. Each time the transceiver enters RX mode the ...
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RSSI and Clear Channel Assessment Received signal strength indicator (RSSI estimate of the signal strength in the channel to which the receiver is tuned. The RSSI value can be read from an 8-bit register with 0.5 dB ...
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Si4430/31/32-B1 9. Reference Design Reference designs are available at schematics, BOM, and layout. TX matching component values for the different frequency bands can be found in the application notes “AN435: Si4032/4432 PA Matching” and “AN436: Si4030/4031/4430/4431 PA Matching.” RX matching ...
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... AN415: EZRadioPRO Programming Guide AN417: Si4x3x Family Crystal Oscillators AN419: ARIB STD-T67 Narrow-Band 426/429 MHz Measured on the Si4431-A0 AN427: EZRadioPRO Si433x and Si443x RX LNA Matching AN429: Using the DC-DC Converter on the F9xx Series MCU for Single Battery Operation with the ...
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Si4430/31/32-B1 12. Register Table and Descriptions Add R/W Function/Desc 00 R Device Type 01 R Device Version 02 R Device Status 03 R Interrupt Status Interrupt Status 2 05 R/W Interrupt Enable 1 06 R/W Interrupt Enable ...
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Add R/W Function/Desc 31 R EzMAC status 32 R/W Header Control 1 33 R/W Header Control 2 34 R/W Preamble Length 35 R/W Preamble Detection Control 36 R/W Sync Word 3 37 R/W Sync Word 2 38 R/W Sync Word ...
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Si4430/31/32-B1 13. Pin Descriptions: Si4430/31/32 Pin Pin Name I/O 1 VDD_RF VDD +1.8 to +3.6 V supply voltage input to all analog +1.7 V regulators. The recommended Transmit output pin. The PA output ...
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... Ordering Information Part Number* Si4430-B1-FM ISM EZRadioPRO Transceiver Si4431-B1-FM ISM EZRadioPRO Transceiver Si4432-B1-FM ISM EZRadioPRO Transceiver *Note: Add an “(R)” at the end of the device part number to denote tape and reel option. Si4430/31/32-B1 Description Rev 1.1 Package Operating Type Temperature QFN-20 – °C ...
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... Mark Method Part Number Line 1 Marking Die Revision Line 2 Marking: TTTTT = Internal Code YY= Year Line 3 Marking Workweek Si4430 1 = Si4431 2 = Si4432 B = Revision B1 Internal tracking code. Assigned by the Assembly House. Corresponds to the last significant digit of the year and workweek of the mold date. Rev 1.1 ...
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Package Outline: Si4430/31/32 Figure 33 illustrates the package details for the Si4430/31/32. Table 19 lists the values for the dimensions shown in the illustration. Figure 33. 20-Pin Quad Flat No-Lead (QFN) Symbol ...
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Si4430/31/32-B1 17. PCB Land Pattern: Si4430/31/32 Figure 34 illustrates the PCB land pattern details for the Si4430/31/32. Table 20 lists the values for the dimensions shown in the illustration. 70 Figure 34. PCB Land Pattern Rev 1.1 ...
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Table 20. PCB Land Pattern Dimensions Symbol Min C1 3. 0.20 X2 2.65 Y1 0.65 Y2 2.65 Notes: General 1. All dimensions shown are in millimeters (mm) unless otherwise noted. 2. This land pattern design is ...
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Si4430/31/32- OCUMENT HANGE IST Revision 0.4 to Revision 1.0 Combined 4430/4431/4432 into single data sheet. Added Max Shutdown and Standby Currents and adjusted typical values. Updated TX currents. Increased datarate to 256 kbps. ...
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N : OTES Si4430/31/32-B1 Rev 1.1 73 ...
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